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Searched refs:RREG32_SOC15_OFFSET (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ !
Dgfxhub_v2_1.c299 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i); in gfxhub_v2_1_setup_vmid_config()
605 adev->gmc.VM_CONTEXT_CNTL[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i); in gfxhub_v2_1_save_regs()
606 …adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAG… in gfxhub_v2_1_save_regs()
607 …adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAG… in gfxhub_v2_1_save_regs()
608 …adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PA… in gfxhub_v2_1_save_regs()
609 …adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PA… in gfxhub_v2_1_save_regs()
610 …adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE… in gfxhub_v2_1_save_regs()
611 …adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE… in gfxhub_v2_1_save_regs()
Dmmhub_v9_4.c163 tmp = RREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs()
180 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_tlb_regs()
206 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
224 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL2, in mmhub_v9_4_init_cache_regs()
260 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL, in mmhub_v9_4_enable_system_domain()
310 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL, in mmhub_v9_4_setup_vmid_config()
420 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_gart_disable()
433 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_gart_disable()
456 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_set_fault_enable_default()
567 def = data = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_update_medium_grain_clock_gating()
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Dmmhub_v1_8.c346 tmp = RREG32_SOC15_OFFSET(MMHUB, j, regVM_CONTEXT1_CNTL, in mmhub_v1_8_setup_vmid_config()
710 reg_value = RREG32_SOC15_OFFSET(MMHUB, mmhub_inst, in mmhub_v1_8_inst_query_ras_err_status()
763 reg_value = RREG32_SOC15_OFFSET(MMHUB, mmhub_inst, in mmhub_v1_8_inst_reset_ras_err_status()
774 reg_value = RREG32_SOC15_OFFSET(MMHUB, mmhub_inst, in mmhub_v1_8_inst_reset_ras_err_status()
785 reg_value = RREG32_SOC15_OFFSET(MMHUB, mmhub_inst, in mmhub_v1_8_inst_reset_ras_err_status()
Djpeg_v4_0_3.c542 ring->wptr = RREG32_SOC15_OFFSET( in jpeg_v4_0_3_start()
600 return RREG32_SOC15_OFFSET( in jpeg_v4_0_3_dec_ring_get_rptr()
619 return RREG32_SOC15_OFFSET( in jpeg_v4_0_3_dec_ring_get_wptr()
896 ret &= ((RREG32_SOC15_OFFSET( in jpeg_v4_0_3_is_idle()
Dsoc15_common.h78 #define RREG32_SOC15_OFFSET(ip, inst, reg, offset) \ macro
Dgfxhub_v1_0.c265 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i); in gfxhub_v1_0_setup_vmid_config()
Dgfxhub_v2_0.c290 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i); in gfxhub_v2_0_setup_vmid_config()
Dgfxhub_v3_0_3.c303 tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i); in gfxhub_v3_0_3_setup_vmid_config()
Dgfxhub_v3_0.c298 tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i); in gfxhub_v3_0_setup_vmid_config()
Dmmhub_v3_0_2.c319 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i); in mmhub_v3_0_2_setup_vmid_config()
Dmmhub_v3_0_1.c314 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i); in mmhub_v3_0_1_setup_vmid_config()
Dmmhub_v2_0.c370 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i); in mmhub_v2_0_setup_vmid_config()
Dmmhub_v2_3.c288 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i); in mmhub_v2_3_setup_vmid_config()
Dmmhub_v3_0.c327 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i); in mmhub_v3_0_setup_vmid_config()
Dgfxhub_v1_2.c334 tmp = RREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, i); in gfxhub_v1_2_xcc_setup_vmid_config()
Dmmhub_v1_0.c247 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i); in mmhub_v1_0_setup_vmid_config()
Dmmhub_v1_7.c277 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_CNTL, i); in mmhub_v1_7_setup_vmid_config()