Searched refs:REG_HDMI_PHY_QSERDES_TX_LX_RESET_TSYNC_EN (Results 1 – 2 of 2) sorted by relevance
1286 #define REG_HDMI_PHY_QSERDES_TX_LX_RESET_TSYNC_EN 0x00000034 macro
432 REG_HDMI_PHY_QSERDES_TX_LX_RESET_TSYNC_EN, in hdmi_8996_pll_set_clk_rate()