| /linux-6.6.21/drivers/net/ethernet/mscc/ |
| D | vsc7514_regs.c | 72 REG(ANA_ADVLEARN, 0x009000),
73 REG(ANA_VLANMASK, 0x009004),
74 REG(ANA_PORT_B_DOMAIN, 0x009008),
75 REG(ANA_ANAGEFIL, 0x00900c),
76 REG(ANA_ANEVENTS, 0x009010),
77 REG(ANA_STORMLIMIT_BURST, 0x009014),
78 REG(ANA_STORMLIMIT_CFG, 0x009018),
79 REG(ANA_ISOLATED_PORTS, 0x009028),
80 REG(ANA_COMMUNITY_PORTS, 0x00902c),
81 REG(ANA_AUTOAGE, 0x009030),
[all …]
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| /linux-6.6.21/drivers/net/dsa/ocelot/ |
| D | seville_vsc9953.c | 43 REG(ANA_ADVLEARN, 0x00b500),
44 REG(ANA_VLANMASK, 0x00b504),
46 REG(ANA_ANAGEFIL, 0x00b50c),
47 REG(ANA_ANEVENTS, 0x00b510),
48 REG(ANA_STORMLIMIT_BURST, 0x00b514),
49 REG(ANA_STORMLIMIT_CFG, 0x00b518),
50 REG(ANA_ISOLATED_PORTS, 0x00b528),
51 REG(ANA_COMMUNITY_PORTS, 0x00b52c),
52 REG(ANA_AUTOAGE, 0x00b530),
53 REG(ANA_MACTOPTIONS, 0x00b534),
[all …]
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| D | felix_vsc9959.c | 49 REG(ANA_ADVLEARN, 0x0089a0),
50 REG(ANA_VLANMASK, 0x0089a4),
52 REG(ANA_ANAGEFIL, 0x0089ac),
53 REG(ANA_ANEVENTS, 0x0089b0),
54 REG(ANA_STORMLIMIT_BURST, 0x0089b4),
55 REG(ANA_STORMLIMIT_CFG, 0x0089b8),
56 REG(ANA_ISOLATED_PORTS, 0x0089c8),
57 REG(ANA_COMMUNITY_PORTS, 0x0089cc),
58 REG(ANA_AUTOAGE, 0x0089d0),
59 REG(ANA_MACTOPTIONS, 0x0089d4),
[all …]
|
| /linux-6.6.21/tools/perf/arch/csky/util/ |
| D | unwind-libdw.c | 16 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
23 dwarf_regs[0] = REG(A0); in libdw__arch_set_initial_registers()
24 dwarf_regs[1] = REG(A1); in libdw__arch_set_initial_registers()
25 dwarf_regs[2] = REG(A2); in libdw__arch_set_initial_registers()
26 dwarf_regs[3] = REG(A3); in libdw__arch_set_initial_registers()
27 dwarf_regs[4] = REG(REGS0); in libdw__arch_set_initial_registers()
28 dwarf_regs[5] = REG(REGS1); in libdw__arch_set_initial_registers()
29 dwarf_regs[6] = REG(REGS2); in libdw__arch_set_initial_registers()
30 dwarf_regs[7] = REG(REGS3); in libdw__arch_set_initial_registers()
31 dwarf_regs[8] = REG(REGS4); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/tools/perf/arch/s390/util/ |
| D | unwind-libdw.c | 17 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
26 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
27 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
28 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
29 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
30 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
31 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
32 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
33 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
34 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
|
| /linux-6.6.21/tools/perf/arch/arm64/util/ |
| D | unwind-libdw.c | 14 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
20 dwarf_regs[0] = REG(X0); in libdw__arch_set_initial_registers()
21 dwarf_regs[1] = REG(X1); in libdw__arch_set_initial_registers()
22 dwarf_regs[2] = REG(X2); in libdw__arch_set_initial_registers()
23 dwarf_regs[3] = REG(X3); in libdw__arch_set_initial_registers()
24 dwarf_regs[4] = REG(X4); in libdw__arch_set_initial_registers()
25 dwarf_regs[5] = REG(X5); in libdw__arch_set_initial_registers()
26 dwarf_regs[6] = REG(X6); in libdw__arch_set_initial_registers()
27 dwarf_regs[7] = REG(X7); in libdw__arch_set_initial_registers()
28 dwarf_regs[8] = REG(X8); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/tools/perf/arch/loongarch/util/ |
| D | unwind-libdw.c | 16 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
23 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
24 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
25 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
26 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
27 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
28 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
29 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
30 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
31 dwarf_regs[9] = REG(R9); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/tools/perf/arch/riscv/util/ |
| D | unwind-libdw.c | 16 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
23 dwarf_regs[1] = REG(RA); in libdw__arch_set_initial_registers()
24 dwarf_regs[2] = REG(SP); in libdw__arch_set_initial_registers()
25 dwarf_regs[3] = REG(GP); in libdw__arch_set_initial_registers()
26 dwarf_regs[4] = REG(TP); in libdw__arch_set_initial_registers()
27 dwarf_regs[5] = REG(T0); in libdw__arch_set_initial_registers()
28 dwarf_regs[6] = REG(T1); in libdw__arch_set_initial_registers()
29 dwarf_regs[7] = REG(T2); in libdw__arch_set_initial_registers()
30 dwarf_regs[8] = REG(S0); in libdw__arch_set_initial_registers()
31 dwarf_regs[9] = REG(S1); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/tools/perf/arch/powerpc/util/ |
| D | unwind-libdw.c | 23 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
29 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
30 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
31 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
32 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
33 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
34 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
35 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
36 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
37 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/drivers/net/ethernet/apple/ |
| D | mace.h | 9 #define REG(x) volatile unsigned char x; char x ## _pad[15] macro
12 REG(rcvfifo); /* receive FIFO */
13 REG(xmtfifo); /* transmit FIFO */
14 REG(xmtfc); /* transmit frame control */
15 REG(xmtfs); /* transmit frame status */
16 REG(xmtrc); /* transmit retry count */
17 REG(rcvfc); /* receive frame control */
18 REG(rcvfs); /* receive frame status (4 bytes) */
19 REG(fifofc); /* FIFO frame count */
20 REG(ir); /* interrupt register */
[all …]
|
| /linux-6.6.21/tools/perf/arch/x86/util/ |
| D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
22 dwarf_regs[0] = REG(AX); in libdw__arch_set_initial_registers()
23 dwarf_regs[1] = REG(CX); in libdw__arch_set_initial_registers()
24 dwarf_regs[2] = REG(DX); in libdw__arch_set_initial_registers()
25 dwarf_regs[3] = REG(BX); in libdw__arch_set_initial_registers()
26 dwarf_regs[4] = REG(SP); in libdw__arch_set_initial_registers()
27 dwarf_regs[5] = REG(BP); in libdw__arch_set_initial_registers()
28 dwarf_regs[6] = REG(SI); in libdw__arch_set_initial_registers()
29 dwarf_regs[7] = REG(DI); in libdw__arch_set_initial_registers()
30 dwarf_regs[8] = REG(IP); in libdw__arch_set_initial_registers()
[all …]
|
| /linux-6.6.21/drivers/regulator/ |
| D | rn5t618-regulator.c | 25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ macro
45 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
46 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
47 REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
48 REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500),
50 REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
51 REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
52 REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000),
53 REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
54 REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000),
[all …]
|
| /linux-6.6.21/drivers/gpu/drm/i915/gt/ |
| D | intel_lrc.c | 54 #define REG(x) (((x) >> 2) | BUILD_BUG_ON_ZERO(x >= 0x200)) in set_offsets() macro
110 REG(0x034),
111 REG(0x030),
112 REG(0x038),
113 REG(0x03c),
114 REG(0x168),
115 REG(0x140),
116 REG(0x110),
117 REG(0x11c),
118 REG(0x114),
[all …]
|
| /linux-6.6.21/drivers/gpu/drm/tidss/ |
| D | tidss_dispc_regs.h | 55 #define REG(r) (dispc_common_regmap[r ## _OFF]) macro
57 #define DSS_REVISION REG(DSS_REVISION)
58 #define DSS_SYSCONFIG REG(DSS_SYSCONFIG)
59 #define DSS_SYSSTATUS REG(DSS_SYSSTATUS)
60 #define DISPC_IRQ_EOI REG(DISPC_IRQ_EOI)
61 #define DISPC_IRQSTATUS_RAW REG(DISPC_IRQSTATUS_RAW)
62 #define DISPC_IRQSTATUS REG(DISPC_IRQSTATUS)
63 #define DISPC_IRQENABLE_SET REG(DISPC_IRQENABLE_SET)
64 #define DISPC_IRQENABLE_CLR REG(DISPC_IRQENABLE_CLR)
65 #define DISPC_VID_IRQENABLE(n) (REG(DISPC_VID_IRQENABLE) + (n) * 4)
[all …]
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_translate_dce120.c | 51 #define REG(reg_name)\ macro
69 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
99 case REG(DC_GPIO_HPD_A): in offset_to_id()
126 case REG(DC_GPIO_SYNCA_A): in offset_to_id()
141 case REG(DC_GPIO_GENLK_A): in offset_to_id()
165 case REG(DC_GPIO_DDC1_A): in offset_to_id()
168 case REG(DC_GPIO_DDC2_A): in offset_to_id()
171 case REG(DC_GPIO_DDC3_A): in offset_to_id()
174 case REG(DC_GPIO_DDC4_A): in offset_to_id()
177 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
|
| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ macro
69 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
99 case REG(DC_GPIO_HPD_A): in offset_to_id()
126 case REG(DC_GPIO_SYNCA_A): in offset_to_id()
141 case REG(DC_GPIO_GENLK_A): in offset_to_id()
165 case REG(DC_GPIO_DDC1_A): in offset_to_id()
168 case REG(DC_GPIO_DDC2_A): in offset_to_id()
171 case REG(DC_GPIO_DDC3_A): in offset_to_id()
174 case REG(DC_GPIO_DDC4_A): in offset_to_id()
177 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /linux-6.6.21/tools/perf/arch/arm/util/ |
| D | unwind-libdw.c | 14 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
20 dwarf_regs[0] = REG(R0); in libdw__arch_set_initial_registers()
21 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
22 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
23 dwarf_regs[3] = REG(R3); in libdw__arch_set_initial_registers()
24 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
25 dwarf_regs[5] = REG(R5); in libdw__arch_set_initial_registers()
26 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
27 dwarf_regs[7] = REG(R7); in libdw__arch_set_initial_registers()
28 dwarf_regs[8] = REG(R8); in libdw__arch_set_initial_registers()
[all …]
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| /linux-6.6.21/arch/m68k/lib/ |
| D | mulsi3.S | 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
67 #define d0 REG (d0)
68 #define d1 REG (d1)
69 #define d2 REG (d2)
70 #define d3 REG (d3)
71 #define d4 REG (d4)
72 #define d5 REG (d5)
73 #define d6 REG (d6)
74 #define d7 REG (d7)
75 #define a0 REG (a0)
[all …]
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| D | umodsi3.S | 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
67 #define d0 REG (d0)
68 #define d1 REG (d1)
69 #define d2 REG (d2)
70 #define d3 REG (d3)
71 #define d4 REG (d4)
72 #define d5 REG (d5)
73 #define d6 REG (d6)
74 #define d7 REG (d7)
75 #define a0 REG (a0)
[all …]
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| D | modsi3.S | 63 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
69 #define d0 REG (d0)
70 #define d1 REG (d1)
71 #define d2 REG (d2)
72 #define d3 REG (d3)
73 #define d4 REG (d4)
74 #define d5 REG (d5)
75 #define d6 REG (d6)
76 #define d7 REG (d7)
77 #define a0 REG (a0)
[all …]
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| /linux-6.6.21/arch/sparc/include/asm/ |
| D | trap_block.h | 120 #define __GET_CPUID(REG) \ argument
122 661: ldxa [%g0] ASI_UPA_CONFIG, REG; \
123 srlx REG, 17, REG; \
124 and REG, 0x1f, REG; \
130 ldxa [%g0] ASI_SAFARI_CONFIG, REG; \
131 srlx REG, 17, REG; \
132 and REG, 0x3ff, REG; \
135 ldxa [%g0] ASI_JBUS_CONFIG, REG; \
136 srlx REG, 17, REG; \
137 and REG, 0x1f, REG; \
[all …]
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| D | asm.h | 14 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument
15 brz,PREDICT REG, DEST
16 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
17 brz,a,PREDICT REG, DEST
18 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument
19 brnz,PREDICT REG, DEST
20 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
21 brnz,a,PREDICT REG, DEST
27 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument
28 cmp REG, 0; \
[all …]
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| /linux-6.6.21/tools/testing/selftests/powerpc/nx-gzip/include/ |
| D | nxu.h | 428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \ argument
429 & REG##_mask)
430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \ argument
431 & REG##_mask)
432 #define get32(ST, REG) (be32toh(ST.REG)) argument
433 #define getp32(ST, REG) (be32toh((ST)->REG)) argument
434 #define get64(ST, REG) (be64toh(ST.REG)) argument
435 #define getp64(ST, REG) (be64toh((ST)->REG)) argument
437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \ argument
438 << (31-REG##_offset)))
[all …]
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_translate_dcn20.c | 54 #undef REG
55 #define REG(reg_name)\ macro
73 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
103 case REG(DC_GPIO_HPD_A): in offset_to_id()
130 case REG(DC_GPIO_GENLK_A): in offset_to_id()
155 case REG(DC_GPIO_DDC1_A): in offset_to_id()
158 case REG(DC_GPIO_DDC2_A): in offset_to_id()
161 case REG(DC_GPIO_DDC3_A): in offset_to_id()
164 case REG(DC_GPIO_DDC4_A): in offset_to_id()
167 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| D | hw_translate_dcn30.c | 59 #undef REG
60 #define REG(reg_name)\ macro
78 case REG(DC_GPIO_GENERIC_A): in offset_to_id()
108 case REG(DC_GPIO_HPD_A): in offset_to_id()
135 case REG(DC_GPIO_GENLK_A): in offset_to_id()
160 case REG(DC_GPIO_DDC1_A): in offset_to_id()
163 case REG(DC_GPIO_DDC2_A): in offset_to_id()
166 case REG(DC_GPIO_DDC3_A): in offset_to_id()
169 case REG(DC_GPIO_DDC4_A): in offset_to_id()
172 case REG(DC_GPIO_DDC5_A): in offset_to_id()
[all …]
|