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Searched refs:R8A7790_CLK_Z (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dr8a7790-cpg-mssr.h12 #define R8A7790_CLK_Z 0 macro
Dr8a7790-clock.h19 #define R8A7790_CLK_Z 9 macro
/linux-6.6.21/drivers/clk/renesas/
Dr8a7790-cpg-mssr.c55 DEF_BASE("z", R8A7790_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
/linux-6.6.21/arch/arm/boot/dts/renesas/
Dr8a7790.dtsi78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;