Searched refs:PU (Results 1 – 23 of 23) sorted by relevance
177 #define PU(X) \ in percpu_stats_show() macro183 PU(nr_alloc); in percpu_stats_show()184 PU(nr_dealloc); in percpu_stats_show()185 PU(nr_cur_alloc); in percpu_stats_show()186 PU(nr_max_alloc); in percpu_stats_show()187 PU(nr_chunks); in percpu_stats_show()188 PU(nr_max_chunks); in percpu_stats_show()189 PU(min_alloc_size); in percpu_stats_show()190 PU(max_alloc_size); in percpu_stats_show()194 #undef PU in percpu_stats_show()
17 #define PU (1 << 26) macro33 #define IN_PU (PU)39 #define BIDIR_PU (OE | PU | OD)
613 /* HYS | PD | PU | FSEL_3 | DSE X5 */615 /* HYS | PD | PU | FSEL_3 | DSE X4 */617 /* HYS | PD | PU | FSEL_3 | DSE X3 */622 /* PD | PU | FSEL_2 | DSE X3 */629 /* HYS | PD | PU | FSEL_3 | DSE X6 */631 /* HYS | PD | PU | FSEL_3 | DSE X4 */637 /* PD | PU | FSEL_2 | DSE X3 */
191 /* HYS | PU | PD | FSEL_3 | X5 */194 /* HYS | PU | FSEL_3 | X5 */196 /* HYS | PU | FSEL_3 | X4 */
131 regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
304 /* ID: floating / high: device, low: host -> use PU */
137 regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
721 #define PU(x) \ in print_rt_rq() macro726 PU(rt_nr_running); in print_rt_rq()728 PU(rt_nr_migratory); in print_rt_rq()735 #undef PU in print_rt_rq()746 #define PU(x) \ in print_dl_rq() macro749 PU(dl_nr_running); in print_dl_rq()751 PU(dl_nr_migratory); in print_dl_rq()759 #undef PU in print_dl_rq()
33 /* ARM kHz SOC-PU uV */70 /* ARM kHz SOC-PU uV */105 /* ARM kHz SOC-PU uV */140 /* ARM kHz SOC-PU uV */
23 /* ARM kHz SOC-PU uV */
183 /* ARM kHz SOC-PU uV */205 /* ARM kHz SOC-PU uV */227 /* ARM kHz SOC-PU uV */249 /* ARM kHz SOC-PU uV */
30 /* ARM kHz SOC-PU uV */63 /* ARM kHz SOC-PU uV */
26 /* ARM kHz SOC-PU uV */39 /* ARM kHz SOC-PU uV */
84 /* ARM kHz SOC-PU uV */103 /* ARM kHz SOC-PU uV */
228 /* ARM kHz SOC-PU uV */
957 /* Controls Mic GND, PU or '1' pull Mic GND to GND */
61 /* ARM kHz SOC-PU uV */
64 /* ARM kHz SOC-PU uV */
98 TRCPDCR.PU does not have to be set on Qualcomm Technologies Inc. systems101 watchdog counter is stopped when TRCPDCR.PU is set.
9 Pull Up (PU) are driven by the related PIO block.
222 # the XU into the UVC chain between the PU and OT such that the final223 # chain is IT > PU > XU.0 > OT
148 #define ST_PINCONF_UNPACK_PU(conf) ST_PINCONF_UNPACK(conf, PU)149 #define ST_PINCONF_PACK_PU(conf) ST_PINCONF_PACK(conf, 1, PU)
162 | RESERVED |PS|PU|PD| DRIVE |SS|SD|SO|EC|EF|ER|--| AF_SEL |