Home
last modified time | relevance | path

Searched refs:PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c109 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen6_emit_flush_rcs()
160 *cs++ = (PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen6_emit_breadcrumb_rcs()
318 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen7_emit_flush_rcs()
356 *cs++ = (PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen7_emit_breadcrumb_rcs()
Dgen8_engine_cs.c22 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen8_emit_flush_rcs()
121 flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen11_emit_flush_rcs()
285 bit_group_1 |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; in gen12_emit_flush_rcs()
674 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen8_emit_fini_breadcrumb_rcs()
695 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen11_emit_fini_breadcrumb_rcs()
815 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen12_emit_fini_breadcrumb_rcs()
Dintel_gpu_commands.h305 #define PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH (1<<12) /* gen6+ */ macro
325 PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | \
Dgen7_renderclear.c345 *cs++ = PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | in gen7_emit_pipeline_flush()