Searched refs:PHY_S6G_PLL5G_CFG2_ENA_GAIN (Results 1 – 2 of 2) sorted by relevance
12 #define PHY_S6G_PLL5G_CFG2_ENA_GAIN 1 macro
21 rd_dat |= PHY_S6G_PLL5G_CFG2_ENA_GAIN; in pll5g_detune()35 rd_dat &= ~PHY_S6G_PLL5G_CFG2_ENA_GAIN; in pll5g_tune()