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Searched refs:PHYRegDef (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/drivers/staging/rtl8192u/
Dr819xU_phy.c131 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialRead()
215 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; in rtl8192_phy_RFSerialWrite()
549 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
551 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
553 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
555 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
559 priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
561 priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
563 priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
565 priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
[all …]
Dr8190_rtl8256.c128 pPhyReg = &priv->PHYRegDef[eRFPath]; in phy_rf8256_config_para_file()
Dr8192U.h933 BB_REGISTER_DEFINITION_T PHYRegDef[4]; /* Radio A/B/C/D */ member
/linux-6.6.21/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c98 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead_8723B()
194 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite_8723B()
311 …pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from… in phy_InitBBRFRegisterDefinition()
312 …pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from… in phy_InitBBRFRegisterDefinition()
315 …pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
316 …pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
319 …pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
320 …pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
322 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()
323 pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in phy_InitBBRFRegisterDefinition()
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Drtl8723b_rf6052.c95 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
/linux-6.6.21/drivers/staging/rtl8723bs/include/
Dhal_data.h309 struct bb_register_def PHYRegDef[4]; /* Radio A/B/C/D */ member