Searched refs:PFD0_CLKGATE (Results 1 – 1 of 1) sorted by relevance
391 #define PFD0_CLKGATE BIT(7) macro405 reg |= PFD0_CLKGATE | PFD1_CLKGATE; in disable_anatop_clocks()407 reg |= PFD0_CLKGATE | PFD1_CLKGATE | PFD2_CLKGATE; in disable_anatop_clocks()412 reg |= PFD0_CLKGATE | PFD1_CLKGATE | PFD2_CLKGATE | PFD3_CLKGATE; in disable_anatop_clocks()