| /linux-6.6.21/arch/arm/boot/dts/samsung/ |
| D | s3c64xx.dtsi | 147 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
|
| /linux-6.6.21/include/dt-bindings/clock/ |
| D | samsung,s3c64xx-clock.h | 86 #define PCLK_UART2 71 macro
|
| D | rk3036-cru.h | 70 #define PCLK_UART2 343 macro
|
| D | exynos7-clk.h | 94 #define PCLK_UART2 2 macro
|
| D | rk3188-cru-common.h | 86 #define PCLK_UART2 334 macro
|
| D | rk3128-cru.h | 110 #define PCLK_UART2 343 macro
|
| D | rk3228-cru.h | 109 #define PCLK_UART2 343 macro
|
| D | rv1108-cru.h | 118 #define PCLK_UART2 267 macro
|
| D | rk3368-cru.h | 127 #define PCLK_UART2 343 macro
|
| D | px30-cru.h | 153 #define PCLK_UART2 330 macro
|
| D | rk3328-cru.h | 143 #define PCLK_UART2 212 macro
|
| D | rk3288-cru.h | 135 #define PCLK_UART2 343 macro
|
| D | rk3308-cru.h | 178 #define PCLK_UART2 199 macro
|
| D | rockchip,rv1126-cru.h | 313 #define PCLK_UART2 251 macro
|
| D | rk3399-cru.h | 249 #define PCLK_UART2 354 macro
|
| D | rockchip,rk3588-cru.h | 175 #define PCLK_UART2 160 macro
|
| D | rk3568-cru.h | 351 #define PCLK_UART2 288 macro
|
| /linux-6.6.21/Documentation/devicetree/bindings/clock/ |
| D | rockchip,rk3588-cru.yaml | 16 PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
|
| /linux-6.6.21/drivers/clk/samsung/ |
| D | clk-s3c64xx.c | 242 GATE_BUS(PCLK_UART2, "pclk_uart2", "pclk", PCLK_GATE, 3),
347 ALIAS(PCLK_UART2, "s3c6400-uart.2", "uart"),
|
| /linux-6.6.21/drivers/clk/rockchip/ |
| D | clk-rk3036.c | 419 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
|
| D | clk-rk3128.c | 504 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
|
| D | clk-rk3228.c | 615 GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 14, GFLAGS),
|
| D | clk-rk3188.c | 522 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
|
| D | clk-rk3328.c | 785 GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 13, GFLAGS),
|
| /linux-6.6.21/arch/arm/boot/dts/rockchip/ |
| D | rk3xxx.dtsi | 424 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
|