| /linux-6.6.21/include/dt-bindings/clock/ |
| D | samsung,s3c64xx-clock.h | 67 #define PCLK_SPI1 52 macro
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| D | exynos7-clk.h | 105 #define PCLK_SPI1 13 macro
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| D | rk3188-cru-common.h | 81 #define PCLK_SPI1 329 macro
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| D | rk3368-cru.h | 123 #define PCLK_SPI1 339 macro
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| D | px30-cru.h | 165 #define PCLK_SPI1 342 macro
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| D | rk3288-cru.h | 131 #define PCLK_SPI1 339 macro
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| D | rk3308-cru.h | 187 #define PCLK_SPI1 208 macro
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| D | rockchip,rv1126-cru.h | 321 #define PCLK_SPI1 259 macro
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| D | rk3399-cru.h | 243 #define PCLK_SPI1 348 macro
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| D | rockchip,rk3588-cru.h | 162 #define PCLK_SPI1 147 macro
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| D | rk3568-cru.h | 402 #define PCLK_SPI1 339 macro
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| /linux-6.6.21/drivers/clk/samsung/ |
| D | clk-s3c64xx.c | 223 GATE_BUS(PCLK_SPI1, "pclk_spi1", "pclk", PCLK_GATE, 22),
333 ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi"),
354 ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi_busclk0"),
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| D | clk-exynos7.c | 763 GATE(PCLK_SPI1, "pclk_spi1", "mout_aclk_peric1_66_user",
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| /linux-6.6.21/arch/arm/boot/dts/rockchip/ |
| D | rk3xxx.dtsi | 466 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| D | rk3288.dtsi | 293 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| /linux-6.6.21/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 521 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 13, GFLAGS),
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| D | clk-rk3368.c | 801 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 5, GFLAGS),
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| D | clk-rk3288.c | 736 GATE(PCLK_SPI1, "pclk_spi1", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 5, GFLAGS),
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| D | clk-px30.c | 859 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 2, GFLAGS),
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| D | clk-rk3308.c | 876 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 5, GFLAGS),
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| D | clk-rv1126.c | 534 GATE(PCLK_SPI1, "pclk_spi1", "pclk_pdbus", 0,
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| D | clk-rk3399.c | 1047 GATE(PCLK_SPI1, "pclk_spi1", "pclk_perilp1", 0, RK3399_CLKGATE_CON(23), 11, GFLAGS),
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| D | clk-rk3568.c | 1352 GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus", 0,
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| /linux-6.6.21/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 249 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| D | rk3308.dtsi | 378 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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