Searched refs:PCI_PM_CTRL_STATE_MASK (Results 1 – 17 of 17) sorted by relevance
648 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) { in apple_airport_reset()649 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in apple_airport_reset()654 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) { in apple_airport_reset()
125 new_state = (pci_power_t)(new_value & PCI_PM_CTRL_STATE_MASK); in pm_ctrl_write()
390 catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D3hot); in catpt_dsp_power_down()414 catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D0); in catpt_dsp_power_up()
781 csr &= ~PCI_PM_CTRL_STATE_MASK; in _ish_hw_reset()787 csr &= ~PCI_PM_CTRL_STATE_MASK; in _ish_hw_reset()
353 dev->current_state = (pci_power_t __force)(pmcsr & PCI_PM_CTRL_STATE_MASK); in mid_power_off_one_device()
99 & PCI_PM_CTRL_STATE_MASK); in vgpu_pci_cfg_mem_write()
1112 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_update_current_state()1263 state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_power_up()1317 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_set_full_power_state()1416 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in pci_set_low_power_state()1429 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_set_low_power_state()4898 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()4903 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()
2451 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) in quirk_e100_interrupt()
254 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ macro
585 d3_state = ((pmcsr & PCI_PM_CTRL_STATE_MASK) == in telem_soc_states_show()
726 switch (le32_to_cpu(val) & PCI_PM_CTRL_STATE_MASK) { in vfio_pm_config_write()782 PCI_PM_CTRL_STATE_MASK)); in init_pci_cap_pm_perm()
3195 ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | in bnx2x_set_power_state()3198 if (pmcsr & PCI_PM_CTRL_STATE_MASK) in bnx2x_set_power_state()3212 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in bnx2x_set_power_state()
1476 (!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0))) in bnx2x_is_nvm_accessible()
831 if (tmp & PCI_PM_CTRL_STATE_MASK) { in natsemi_probe1()833 u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK; in natsemi_probe1()
2528 pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | state; in radeonfb_whack_power_state()
3144 data &= ~PCI_PM_CTRL_STATE_MASK; in hw_cfg_wol_pme()
16514 pm_reg &= ~PCI_PM_CTRL_STATE_MASK; in tg3_get_invariants()