Searched refs:PCIE_CORE_CTRL (Results 1 – 2 of 2) sorted by relevance
88 #define PCIE_CORE_CTRL (PCIE_CORE_CTRL_MGMT_BASE + 0x000) macro
345 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()353 status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL); in rockchip_pcie_host_init_port()