1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19
20 #include "internals.h"
21
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25
26 /**
27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
28 * @bus: I3C bus to take the lock on
29 *
30 * This function takes the bus lock so that no other operations can occur on
31 * the bus. This is needed for all kind of bus maintenance operation, like
32 * - enabling/disabling slave events
33 * - re-triggering DAA
34 * - changing the dynamic address of a device
35 * - relinquishing mastership
36 * - ...
37 *
38 * The reason for this kind of locking is that we don't want drivers and core
39 * logic to rely on I3C device information that could be changed behind their
40 * back.
41 */
i3c_bus_maintenance_lock(struct i3c_bus * bus)42 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
43 {
44 down_write(&bus->lock);
45 }
46
47 /**
48 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
49 * operation
50 * @bus: I3C bus to release the lock on
51 *
52 * Should be called when the bus maintenance operation is done. See
53 * i3c_bus_maintenance_lock() for more details on what these maintenance
54 * operations are.
55 */
i3c_bus_maintenance_unlock(struct i3c_bus * bus)56 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
57 {
58 up_write(&bus->lock);
59 }
60
61 /**
62 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
63 * @bus: I3C bus to take the lock on
64 *
65 * This function takes the bus lock for any operation that is not a maintenance
66 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
67 * maintenance operations). Basically all communications with I3C devices are
68 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
69 * state or I3C dynamic address).
70 *
71 * Note that this lock is not guaranteeing serialization of normal operations.
72 * In other words, transfer requests passed to the I3C master can be submitted
73 * in parallel and I3C master drivers have to use their own locking to make
74 * sure two different communications are not inter-mixed, or access to the
75 * output/input queue is not done while the engine is busy.
76 */
i3c_bus_normaluse_lock(struct i3c_bus * bus)77 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
78 {
79 down_read(&bus->lock);
80 }
81
82 /**
83 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
84 * @bus: I3C bus to release the lock on
85 *
86 * Should be called when a normal operation is done. See
87 * i3c_bus_normaluse_lock() for more details on what these normal operations
88 * are.
89 */
i3c_bus_normaluse_unlock(struct i3c_bus * bus)90 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
91 {
92 up_read(&bus->lock);
93 }
94
95 static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus * i3cbus)96 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
97 {
98 return container_of(i3cbus, struct i3c_master_controller, bus);
99 }
100
dev_to_i3cmaster(struct device * dev)101 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
102 {
103 return container_of(dev, struct i3c_master_controller, dev);
104 }
105
106 static const struct device_type i3c_device_type;
107
dev_to_i3cbus(struct device * dev)108 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
109 {
110 struct i3c_master_controller *master;
111
112 if (dev->type == &i3c_device_type)
113 return dev_to_i3cdev(dev)->bus;
114
115 master = dev_to_i3cmaster(dev);
116
117 return &master->bus;
118 }
119
dev_to_i3cdesc(struct device * dev)120 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
121 {
122 struct i3c_master_controller *master;
123
124 if (dev->type == &i3c_device_type)
125 return dev_to_i3cdev(dev)->desc;
126
127 master = dev_to_i3cmaster(dev);
128
129 return master->this;
130 }
131
bcr_show(struct device * dev,struct device_attribute * da,char * buf)132 static ssize_t bcr_show(struct device *dev,
133 struct device_attribute *da,
134 char *buf)
135 {
136 struct i3c_bus *bus = dev_to_i3cbus(dev);
137 struct i3c_dev_desc *desc;
138 ssize_t ret;
139
140 i3c_bus_normaluse_lock(bus);
141 desc = dev_to_i3cdesc(dev);
142 ret = sprintf(buf, "%x\n", desc->info.bcr);
143 i3c_bus_normaluse_unlock(bus);
144
145 return ret;
146 }
147 static DEVICE_ATTR_RO(bcr);
148
dcr_show(struct device * dev,struct device_attribute * da,char * buf)149 static ssize_t dcr_show(struct device *dev,
150 struct device_attribute *da,
151 char *buf)
152 {
153 struct i3c_bus *bus = dev_to_i3cbus(dev);
154 struct i3c_dev_desc *desc;
155 ssize_t ret;
156
157 i3c_bus_normaluse_lock(bus);
158 desc = dev_to_i3cdesc(dev);
159 ret = sprintf(buf, "%x\n", desc->info.dcr);
160 i3c_bus_normaluse_unlock(bus);
161
162 return ret;
163 }
164 static DEVICE_ATTR_RO(dcr);
165
pid_show(struct device * dev,struct device_attribute * da,char * buf)166 static ssize_t pid_show(struct device *dev,
167 struct device_attribute *da,
168 char *buf)
169 {
170 struct i3c_bus *bus = dev_to_i3cbus(dev);
171 struct i3c_dev_desc *desc;
172 ssize_t ret;
173
174 i3c_bus_normaluse_lock(bus);
175 desc = dev_to_i3cdesc(dev);
176 ret = sprintf(buf, "%llx\n", desc->info.pid);
177 i3c_bus_normaluse_unlock(bus);
178
179 return ret;
180 }
181 static DEVICE_ATTR_RO(pid);
182
dynamic_address_show(struct device * dev,struct device_attribute * da,char * buf)183 static ssize_t dynamic_address_show(struct device *dev,
184 struct device_attribute *da,
185 char *buf)
186 {
187 struct i3c_bus *bus = dev_to_i3cbus(dev);
188 struct i3c_dev_desc *desc;
189 ssize_t ret;
190
191 i3c_bus_normaluse_lock(bus);
192 desc = dev_to_i3cdesc(dev);
193 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
194 i3c_bus_normaluse_unlock(bus);
195
196 return ret;
197 }
198 static DEVICE_ATTR_RO(dynamic_address);
199
200 static const char * const hdrcap_strings[] = {
201 "hdr-ddr", "hdr-tsp", "hdr-tsl",
202 };
203
hdrcap_show(struct device * dev,struct device_attribute * da,char * buf)204 static ssize_t hdrcap_show(struct device *dev,
205 struct device_attribute *da,
206 char *buf)
207 {
208 struct i3c_bus *bus = dev_to_i3cbus(dev);
209 struct i3c_dev_desc *desc;
210 ssize_t offset = 0, ret;
211 unsigned long caps;
212 int mode;
213
214 i3c_bus_normaluse_lock(bus);
215 desc = dev_to_i3cdesc(dev);
216 caps = desc->info.hdr_cap;
217 for_each_set_bit(mode, &caps, 8) {
218 if (mode >= ARRAY_SIZE(hdrcap_strings))
219 break;
220
221 if (!hdrcap_strings[mode])
222 continue;
223
224 ret = sprintf(buf + offset, offset ? " %s" : "%s",
225 hdrcap_strings[mode]);
226 if (ret < 0)
227 goto out;
228
229 offset += ret;
230 }
231
232 ret = sprintf(buf + offset, "\n");
233 if (ret < 0)
234 goto out;
235
236 ret = offset + ret;
237
238 out:
239 i3c_bus_normaluse_unlock(bus);
240
241 return ret;
242 }
243 static DEVICE_ATTR_RO(hdrcap);
244
modalias_show(struct device * dev,struct device_attribute * da,char * buf)245 static ssize_t modalias_show(struct device *dev,
246 struct device_attribute *da, char *buf)
247 {
248 struct i3c_device *i3c = dev_to_i3cdev(dev);
249 struct i3c_device_info devinfo;
250 u16 manuf, part, ext;
251
252 i3c_device_get_info(i3c, &devinfo);
253 manuf = I3C_PID_MANUF_ID(devinfo.pid);
254 part = I3C_PID_PART_ID(devinfo.pid);
255 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
256
257 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
258 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
259 manuf);
260
261 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
262 devinfo.dcr, manuf, part, ext);
263 }
264 static DEVICE_ATTR_RO(modalias);
265
266 static struct attribute *i3c_device_attrs[] = {
267 &dev_attr_bcr.attr,
268 &dev_attr_dcr.attr,
269 &dev_attr_pid.attr,
270 &dev_attr_dynamic_address.attr,
271 &dev_attr_hdrcap.attr,
272 &dev_attr_modalias.attr,
273 NULL,
274 };
275 ATTRIBUTE_GROUPS(i3c_device);
276
i3c_device_uevent(const struct device * dev,struct kobj_uevent_env * env)277 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
278 {
279 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
280 struct i3c_device_info devinfo;
281 u16 manuf, part, ext;
282
283 i3c_device_get_info(i3cdev, &devinfo);
284 manuf = I3C_PID_MANUF_ID(devinfo.pid);
285 part = I3C_PID_PART_ID(devinfo.pid);
286 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
287
288 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
289 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
290 devinfo.dcr, manuf);
291
292 return add_uevent_var(env,
293 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
294 devinfo.dcr, manuf, part, ext);
295 }
296
297 static const struct device_type i3c_device_type = {
298 .groups = i3c_device_groups,
299 .uevent = i3c_device_uevent,
300 };
301
i3c_device_match(struct device * dev,struct device_driver * drv)302 static int i3c_device_match(struct device *dev, struct device_driver *drv)
303 {
304 struct i3c_device *i3cdev;
305 struct i3c_driver *i3cdrv;
306
307 if (dev->type != &i3c_device_type)
308 return 0;
309
310 i3cdev = dev_to_i3cdev(dev);
311 i3cdrv = drv_to_i3cdrv(drv);
312 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
313 return 1;
314
315 return 0;
316 }
317
i3c_device_probe(struct device * dev)318 static int i3c_device_probe(struct device *dev)
319 {
320 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
321 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
322
323 return driver->probe(i3cdev);
324 }
325
i3c_device_remove(struct device * dev)326 static void i3c_device_remove(struct device *dev)
327 {
328 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
329 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
330
331 if (driver->remove)
332 driver->remove(i3cdev);
333
334 i3c_device_free_ibi(i3cdev);
335 }
336
337 struct bus_type i3c_bus_type = {
338 .name = "i3c",
339 .match = i3c_device_match,
340 .probe = i3c_device_probe,
341 .remove = i3c_device_remove,
342 };
343
344 static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus * bus,u16 addr)345 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
346 {
347 unsigned long status;
348 int bitpos = addr * 2;
349
350 if (addr > I2C_MAX_ADDR)
351 return I3C_ADDR_SLOT_RSVD;
352
353 status = bus->addrslots[bitpos / BITS_PER_LONG];
354 status >>= bitpos % BITS_PER_LONG;
355
356 return status & I3C_ADDR_SLOT_STATUS_MASK;
357 }
358
i3c_bus_set_addr_slot_status(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status)359 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
360 enum i3c_addr_slot_status status)
361 {
362 int bitpos = addr * 2;
363 unsigned long *ptr;
364
365 if (addr > I2C_MAX_ADDR)
366 return;
367
368 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
369 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
370 (bitpos % BITS_PER_LONG));
371 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
372 }
373
i3c_bus_dev_addr_is_avail(struct i3c_bus * bus,u8 addr)374 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
375 {
376 enum i3c_addr_slot_status status;
377
378 status = i3c_bus_get_addr_slot_status(bus, addr);
379
380 return status == I3C_ADDR_SLOT_FREE;
381 }
382
i3c_bus_get_free_addr(struct i3c_bus * bus,u8 start_addr)383 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
384 {
385 enum i3c_addr_slot_status status;
386 u8 addr;
387
388 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
389 status = i3c_bus_get_addr_slot_status(bus, addr);
390 if (status == I3C_ADDR_SLOT_FREE)
391 return addr;
392 }
393
394 return -ENOMEM;
395 }
396
i3c_bus_init_addrslots(struct i3c_bus * bus)397 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
398 {
399 int i;
400
401 /* Addresses 0 to 7 are reserved. */
402 for (i = 0; i < 8; i++)
403 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
404
405 /*
406 * Reserve broadcast address and all addresses that might collide
407 * with the broadcast address when facing a single bit error.
408 */
409 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
410 I3C_ADDR_SLOT_RSVD);
411 for (i = 0; i < 7; i++)
412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
413 I3C_ADDR_SLOT_RSVD);
414 }
415
i3c_bus_cleanup(struct i3c_bus * i3cbus)416 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
417 {
418 mutex_lock(&i3c_core_lock);
419 idr_remove(&i3c_bus_idr, i3cbus->id);
420 mutex_unlock(&i3c_core_lock);
421 }
422
i3c_bus_init(struct i3c_bus * i3cbus,struct device_node * np)423 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
424 {
425 int ret, start, end, id = -1;
426
427 init_rwsem(&i3cbus->lock);
428 INIT_LIST_HEAD(&i3cbus->devs.i2c);
429 INIT_LIST_HEAD(&i3cbus->devs.i3c);
430 i3c_bus_init_addrslots(i3cbus);
431 i3cbus->mode = I3C_BUS_MODE_PURE;
432
433 if (np)
434 id = of_alias_get_id(np, "i3c");
435
436 mutex_lock(&i3c_core_lock);
437 if (id >= 0) {
438 start = id;
439 end = start + 1;
440 } else {
441 start = __i3c_first_dynamic_bus_num;
442 end = 0;
443 }
444
445 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
446 mutex_unlock(&i3c_core_lock);
447
448 if (ret < 0)
449 return ret;
450
451 i3cbus->id = ret;
452
453 return 0;
454 }
455
456 static const char * const i3c_bus_mode_strings[] = {
457 [I3C_BUS_MODE_PURE] = "pure",
458 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
459 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
460 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
461 };
462
mode_show(struct device * dev,struct device_attribute * da,char * buf)463 static ssize_t mode_show(struct device *dev,
464 struct device_attribute *da,
465 char *buf)
466 {
467 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
468 ssize_t ret;
469
470 i3c_bus_normaluse_lock(i3cbus);
471 if (i3cbus->mode < 0 ||
472 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
473 !i3c_bus_mode_strings[i3cbus->mode])
474 ret = sprintf(buf, "unknown\n");
475 else
476 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
477 i3c_bus_normaluse_unlock(i3cbus);
478
479 return ret;
480 }
481 static DEVICE_ATTR_RO(mode);
482
current_master_show(struct device * dev,struct device_attribute * da,char * buf)483 static ssize_t current_master_show(struct device *dev,
484 struct device_attribute *da,
485 char *buf)
486 {
487 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
488 ssize_t ret;
489
490 i3c_bus_normaluse_lock(i3cbus);
491 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
492 i3cbus->cur_master->info.pid);
493 i3c_bus_normaluse_unlock(i3cbus);
494
495 return ret;
496 }
497 static DEVICE_ATTR_RO(current_master);
498
i3c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)499 static ssize_t i3c_scl_frequency_show(struct device *dev,
500 struct device_attribute *da,
501 char *buf)
502 {
503 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
504 ssize_t ret;
505
506 i3c_bus_normaluse_lock(i3cbus);
507 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
508 i3c_bus_normaluse_unlock(i3cbus);
509
510 return ret;
511 }
512 static DEVICE_ATTR_RO(i3c_scl_frequency);
513
i2c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)514 static ssize_t i2c_scl_frequency_show(struct device *dev,
515 struct device_attribute *da,
516 char *buf)
517 {
518 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
519 ssize_t ret;
520
521 i3c_bus_normaluse_lock(i3cbus);
522 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
523 i3c_bus_normaluse_unlock(i3cbus);
524
525 return ret;
526 }
527 static DEVICE_ATTR_RO(i2c_scl_frequency);
528
529 static struct attribute *i3c_masterdev_attrs[] = {
530 &dev_attr_mode.attr,
531 &dev_attr_current_master.attr,
532 &dev_attr_i3c_scl_frequency.attr,
533 &dev_attr_i2c_scl_frequency.attr,
534 &dev_attr_bcr.attr,
535 &dev_attr_dcr.attr,
536 &dev_attr_pid.attr,
537 &dev_attr_dynamic_address.attr,
538 &dev_attr_hdrcap.attr,
539 NULL,
540 };
541 ATTRIBUTE_GROUPS(i3c_masterdev);
542
i3c_masterdev_release(struct device * dev)543 static void i3c_masterdev_release(struct device *dev)
544 {
545 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
546 struct i3c_bus *bus = dev_to_i3cbus(dev);
547
548 if (master->wq)
549 destroy_workqueue(master->wq);
550
551 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
552 i3c_bus_cleanup(bus);
553
554 of_node_put(dev->of_node);
555 }
556
557 static const struct device_type i3c_masterdev_type = {
558 .groups = i3c_masterdev_groups,
559 };
560
i3c_bus_set_mode(struct i3c_bus * i3cbus,enum i3c_bus_mode mode,unsigned long max_i2c_scl_rate)561 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
562 unsigned long max_i2c_scl_rate)
563 {
564 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
565
566 i3cbus->mode = mode;
567
568 switch (i3cbus->mode) {
569 case I3C_BUS_MODE_PURE:
570 if (!i3cbus->scl_rate.i3c)
571 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
572 break;
573 case I3C_BUS_MODE_MIXED_FAST:
574 case I3C_BUS_MODE_MIXED_LIMITED:
575 if (!i3cbus->scl_rate.i3c)
576 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
577 if (!i3cbus->scl_rate.i2c)
578 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
579 break;
580 case I3C_BUS_MODE_MIXED_SLOW:
581 if (!i3cbus->scl_rate.i2c)
582 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
583 if (!i3cbus->scl_rate.i3c ||
584 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
585 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
586 break;
587 default:
588 return -EINVAL;
589 }
590
591 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
592 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
593
594 /*
595 * I3C/I2C frequency may have been overridden, check that user-provided
596 * values are not exceeding max possible frequency.
597 */
598 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
599 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
600 return -EINVAL;
601
602 return 0;
603 }
604
605 static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter * adap)606 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
607 {
608 return container_of(adap, struct i3c_master_controller, i2c);
609 }
610
611 static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller * master)612 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
613 {
614 return &master->i2c;
615 }
616
i3c_master_free_i2c_dev(struct i2c_dev_desc * dev)617 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
618 {
619 kfree(dev);
620 }
621
622 static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller * master,u16 addr,u8 lvr)623 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
624 u16 addr, u8 lvr)
625 {
626 struct i2c_dev_desc *dev;
627
628 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
629 if (!dev)
630 return ERR_PTR(-ENOMEM);
631
632 dev->common.master = master;
633 dev->addr = addr;
634 dev->lvr = lvr;
635
636 return dev;
637 }
638
i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest * dest,u8 addr,u16 payloadlen)639 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
640 u16 payloadlen)
641 {
642 dest->addr = addr;
643 dest->payload.len = payloadlen;
644 if (payloadlen)
645 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
646 else
647 dest->payload.data = NULL;
648
649 return dest->payload.data;
650 }
651
i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest * dest)652 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
653 {
654 kfree(dest->payload.data);
655 }
656
i3c_ccc_cmd_init(struct i3c_ccc_cmd * cmd,bool rnw,u8 id,struct i3c_ccc_cmd_dest * dests,unsigned int ndests)657 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
658 struct i3c_ccc_cmd_dest *dests,
659 unsigned int ndests)
660 {
661 cmd->rnw = rnw ? 1 : 0;
662 cmd->id = id;
663 cmd->dests = dests;
664 cmd->ndests = ndests;
665 cmd->err = I3C_ERROR_UNKNOWN;
666 }
667
i3c_master_send_ccc_cmd_locked(struct i3c_master_controller * master,struct i3c_ccc_cmd * cmd)668 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
669 struct i3c_ccc_cmd *cmd)
670 {
671 int ret;
672
673 if (!cmd || !master)
674 return -EINVAL;
675
676 if (WARN_ON(master->init_done &&
677 !rwsem_is_locked(&master->bus.lock)))
678 return -EINVAL;
679
680 if (!master->ops->send_ccc_cmd)
681 return -ENOTSUPP;
682
683 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
684 return -EINVAL;
685
686 if (master->ops->supports_ccc_cmd &&
687 !master->ops->supports_ccc_cmd(master, cmd))
688 return -ENOTSUPP;
689
690 ret = master->ops->send_ccc_cmd(master, cmd);
691 if (ret) {
692 if (cmd->err != I3C_ERROR_UNKNOWN)
693 return cmd->err;
694
695 return ret;
696 }
697
698 return 0;
699 }
700
701 static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller * master,u16 addr)702 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
703 u16 addr)
704 {
705 struct i2c_dev_desc *dev;
706
707 i3c_bus_for_each_i2cdev(&master->bus, dev) {
708 if (dev->addr == addr)
709 return dev;
710 }
711
712 return NULL;
713 }
714
715 /**
716 * i3c_master_get_free_addr() - get a free address on the bus
717 * @master: I3C master object
718 * @start_addr: where to start searching
719 *
720 * This function must be called with the bus lock held in write mode.
721 *
722 * Return: the first free address starting at @start_addr (included) or -ENOMEM
723 * if there's no more address available.
724 */
i3c_master_get_free_addr(struct i3c_master_controller * master,u8 start_addr)725 int i3c_master_get_free_addr(struct i3c_master_controller *master,
726 u8 start_addr)
727 {
728 return i3c_bus_get_free_addr(&master->bus, start_addr);
729 }
730 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
731
i3c_device_release(struct device * dev)732 static void i3c_device_release(struct device *dev)
733 {
734 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
735
736 WARN_ON(i3cdev->desc);
737
738 of_node_put(i3cdev->dev.of_node);
739 kfree(i3cdev);
740 }
741
i3c_master_free_i3c_dev(struct i3c_dev_desc * dev)742 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
743 {
744 kfree(dev);
745 }
746
747 static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller * master,const struct i3c_device_info * info)748 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
749 const struct i3c_device_info *info)
750 {
751 struct i3c_dev_desc *dev;
752
753 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
754 if (!dev)
755 return ERR_PTR(-ENOMEM);
756
757 dev->common.master = master;
758 dev->info = *info;
759 mutex_init(&dev->ibi_lock);
760
761 return dev;
762 }
763
i3c_master_rstdaa_locked(struct i3c_master_controller * master,u8 addr)764 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
765 u8 addr)
766 {
767 enum i3c_addr_slot_status addrstat;
768 struct i3c_ccc_cmd_dest dest;
769 struct i3c_ccc_cmd cmd;
770 int ret;
771
772 if (!master)
773 return -EINVAL;
774
775 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
776 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
777 return -EINVAL;
778
779 i3c_ccc_cmd_dest_init(&dest, addr, 0);
780 i3c_ccc_cmd_init(&cmd, false,
781 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
782 &dest, 1);
783 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
784 i3c_ccc_cmd_dest_cleanup(&dest);
785
786 return ret;
787 }
788
789 /**
790 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
791 * procedure
792 * @master: master used to send frames on the bus
793 *
794 * Send a ENTDAA CCC command to start a DAA procedure.
795 *
796 * Note that this function only sends the ENTDAA CCC command, all the logic
797 * behind dynamic address assignment has to be handled in the I3C master
798 * driver.
799 *
800 * This function must be called with the bus lock held in write mode.
801 *
802 * Return: 0 in case of success, a positive I3C error code if the error is
803 * one of the official Mx error codes, and a negative error code otherwise.
804 */
i3c_master_entdaa_locked(struct i3c_master_controller * master)805 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
806 {
807 struct i3c_ccc_cmd_dest dest;
808 struct i3c_ccc_cmd cmd;
809 int ret;
810
811 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
812 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
813 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
814 i3c_ccc_cmd_dest_cleanup(&dest);
815
816 return ret;
817 }
818 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
819
i3c_master_enec_disec_locked(struct i3c_master_controller * master,u8 addr,bool enable,u8 evts)820 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
821 u8 addr, bool enable, u8 evts)
822 {
823 struct i3c_ccc_events *events;
824 struct i3c_ccc_cmd_dest dest;
825 struct i3c_ccc_cmd cmd;
826 int ret;
827
828 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
829 if (!events)
830 return -ENOMEM;
831
832 events->events = evts;
833 i3c_ccc_cmd_init(&cmd, false,
834 enable ?
835 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
836 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
837 &dest, 1);
838 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
839 i3c_ccc_cmd_dest_cleanup(&dest);
840
841 return ret;
842 }
843
844 /**
845 * i3c_master_disec_locked() - send a DISEC CCC command
846 * @master: master used to send frames on the bus
847 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
848 * @evts: events to disable
849 *
850 * Send a DISEC CCC command to disable some or all events coming from a
851 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
852 *
853 * This function must be called with the bus lock held in write mode.
854 *
855 * Return: 0 in case of success, a positive I3C error code if the error is
856 * one of the official Mx error codes, and a negative error code otherwise.
857 */
i3c_master_disec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)858 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
859 u8 evts)
860 {
861 return i3c_master_enec_disec_locked(master, addr, false, evts);
862 }
863 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
864
865 /**
866 * i3c_master_enec_locked() - send an ENEC CCC command
867 * @master: master used to send frames on the bus
868 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
869 * @evts: events to disable
870 *
871 * Sends an ENEC CCC command to enable some or all events coming from a
872 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
873 *
874 * This function must be called with the bus lock held in write mode.
875 *
876 * Return: 0 in case of success, a positive I3C error code if the error is
877 * one of the official Mx error codes, and a negative error code otherwise.
878 */
i3c_master_enec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)879 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
880 u8 evts)
881 {
882 return i3c_master_enec_disec_locked(master, addr, true, evts);
883 }
884 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
885
886 /**
887 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
888 * @master: master used to send frames on the bus
889 *
890 * Send a DEFSLVS CCC command containing all the devices known to the @master.
891 * This is useful when you have secondary masters on the bus to propagate
892 * device information.
893 *
894 * This should be called after all I3C devices have been discovered (in other
895 * words, after the DAA procedure has finished) and instantiated in
896 * &i3c_master_controller_ops->bus_init().
897 * It should also be called if a master ACKed an Hot-Join request and assigned
898 * a dynamic address to the device joining the bus.
899 *
900 * This function must be called with the bus lock held in write mode.
901 *
902 * Return: 0 in case of success, a positive I3C error code if the error is
903 * one of the official Mx error codes, and a negative error code otherwise.
904 */
i3c_master_defslvs_locked(struct i3c_master_controller * master)905 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
906 {
907 struct i3c_ccc_defslvs *defslvs;
908 struct i3c_ccc_dev_desc *desc;
909 struct i3c_ccc_cmd_dest dest;
910 struct i3c_dev_desc *i3cdev;
911 struct i2c_dev_desc *i2cdev;
912 struct i3c_ccc_cmd cmd;
913 struct i3c_bus *bus;
914 bool send = false;
915 int ndevs = 0, ret;
916
917 if (!master)
918 return -EINVAL;
919
920 bus = i3c_master_get_bus(master);
921 i3c_bus_for_each_i3cdev(bus, i3cdev) {
922 ndevs++;
923
924 if (i3cdev == master->this)
925 continue;
926
927 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
928 I3C_BCR_I3C_MASTER)
929 send = true;
930 }
931
932 /* No other master on the bus, skip DEFSLVS. */
933 if (!send)
934 return 0;
935
936 i3c_bus_for_each_i2cdev(bus, i2cdev)
937 ndevs++;
938
939 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
940 struct_size(defslvs, slaves,
941 ndevs - 1));
942 if (!defslvs)
943 return -ENOMEM;
944
945 defslvs->count = ndevs;
946 defslvs->master.bcr = master->this->info.bcr;
947 defslvs->master.dcr = master->this->info.dcr;
948 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
949 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
950
951 desc = defslvs->slaves;
952 i3c_bus_for_each_i2cdev(bus, i2cdev) {
953 desc->lvr = i2cdev->lvr;
954 desc->static_addr = i2cdev->addr << 1;
955 desc++;
956 }
957
958 i3c_bus_for_each_i3cdev(bus, i3cdev) {
959 /* Skip the I3C dev representing this master. */
960 if (i3cdev == master->this)
961 continue;
962
963 desc->bcr = i3cdev->info.bcr;
964 desc->dcr = i3cdev->info.dcr;
965 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
966 desc->static_addr = i3cdev->info.static_addr << 1;
967 desc++;
968 }
969
970 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
971 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
972 i3c_ccc_cmd_dest_cleanup(&dest);
973
974 return ret;
975 }
976 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
977
i3c_master_setda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr,bool setdasa)978 static int i3c_master_setda_locked(struct i3c_master_controller *master,
979 u8 oldaddr, u8 newaddr, bool setdasa)
980 {
981 struct i3c_ccc_cmd_dest dest;
982 struct i3c_ccc_setda *setda;
983 struct i3c_ccc_cmd cmd;
984 int ret;
985
986 if (!oldaddr || !newaddr)
987 return -EINVAL;
988
989 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
990 if (!setda)
991 return -ENOMEM;
992
993 setda->addr = newaddr << 1;
994 i3c_ccc_cmd_init(&cmd, false,
995 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
996 &dest, 1);
997 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
998 i3c_ccc_cmd_dest_cleanup(&dest);
999
1000 return ret;
1001 }
1002
i3c_master_setdasa_locked(struct i3c_master_controller * master,u8 static_addr,u8 dyn_addr)1003 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1004 u8 static_addr, u8 dyn_addr)
1005 {
1006 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1007 }
1008
i3c_master_setnewda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr)1009 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1010 u8 oldaddr, u8 newaddr)
1011 {
1012 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1013 }
1014
i3c_master_getmrl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1015 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1016 struct i3c_device_info *info)
1017 {
1018 struct i3c_ccc_cmd_dest dest;
1019 struct i3c_ccc_mrl *mrl;
1020 struct i3c_ccc_cmd cmd;
1021 int ret;
1022
1023 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1024 if (!mrl)
1025 return -ENOMEM;
1026
1027 /*
1028 * When the device does not have IBI payload GETMRL only returns 2
1029 * bytes of data.
1030 */
1031 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1032 dest.payload.len -= 1;
1033
1034 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1035 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1036 if (ret)
1037 goto out;
1038
1039 switch (dest.payload.len) {
1040 case 3:
1041 info->max_ibi_len = mrl->ibi_len;
1042 fallthrough;
1043 case 2:
1044 info->max_read_len = be16_to_cpu(mrl->read_len);
1045 break;
1046 default:
1047 ret = -EIO;
1048 goto out;
1049 }
1050
1051 out:
1052 i3c_ccc_cmd_dest_cleanup(&dest);
1053
1054 return ret;
1055 }
1056
i3c_master_getmwl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1057 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1058 struct i3c_device_info *info)
1059 {
1060 struct i3c_ccc_cmd_dest dest;
1061 struct i3c_ccc_mwl *mwl;
1062 struct i3c_ccc_cmd cmd;
1063 int ret;
1064
1065 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1066 if (!mwl)
1067 return -ENOMEM;
1068
1069 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1070 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1071 if (ret)
1072 goto out;
1073
1074 if (dest.payload.len != sizeof(*mwl)) {
1075 ret = -EIO;
1076 goto out;
1077 }
1078
1079 info->max_write_len = be16_to_cpu(mwl->len);
1080
1081 out:
1082 i3c_ccc_cmd_dest_cleanup(&dest);
1083
1084 return ret;
1085 }
1086
i3c_master_getmxds_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1087 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1088 struct i3c_device_info *info)
1089 {
1090 struct i3c_ccc_getmxds *getmaxds;
1091 struct i3c_ccc_cmd_dest dest;
1092 struct i3c_ccc_cmd cmd;
1093 int ret;
1094
1095 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1096 sizeof(*getmaxds));
1097 if (!getmaxds)
1098 return -ENOMEM;
1099
1100 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1101 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1102 if (ret)
1103 goto out;
1104
1105 if (dest.payload.len != 2 && dest.payload.len != 5) {
1106 ret = -EIO;
1107 goto out;
1108 }
1109
1110 info->max_read_ds = getmaxds->maxrd;
1111 info->max_write_ds = getmaxds->maxwr;
1112 if (dest.payload.len == 5)
1113 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1114 ((u32)getmaxds->maxrdturn[1] << 8) |
1115 ((u32)getmaxds->maxrdturn[2] << 16);
1116
1117 out:
1118 i3c_ccc_cmd_dest_cleanup(&dest);
1119
1120 return ret;
1121 }
1122
i3c_master_gethdrcap_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1123 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1124 struct i3c_device_info *info)
1125 {
1126 struct i3c_ccc_gethdrcap *gethdrcap;
1127 struct i3c_ccc_cmd_dest dest;
1128 struct i3c_ccc_cmd cmd;
1129 int ret;
1130
1131 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1132 sizeof(*gethdrcap));
1133 if (!gethdrcap)
1134 return -ENOMEM;
1135
1136 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1137 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1138 if (ret)
1139 goto out;
1140
1141 if (dest.payload.len != 1) {
1142 ret = -EIO;
1143 goto out;
1144 }
1145
1146 info->hdr_cap = gethdrcap->modes;
1147
1148 out:
1149 i3c_ccc_cmd_dest_cleanup(&dest);
1150
1151 return ret;
1152 }
1153
i3c_master_getpid_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1154 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1155 struct i3c_device_info *info)
1156 {
1157 struct i3c_ccc_getpid *getpid;
1158 struct i3c_ccc_cmd_dest dest;
1159 struct i3c_ccc_cmd cmd;
1160 int ret, i;
1161
1162 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1163 if (!getpid)
1164 return -ENOMEM;
1165
1166 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1167 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1168 if (ret)
1169 goto out;
1170
1171 info->pid = 0;
1172 for (i = 0; i < sizeof(getpid->pid); i++) {
1173 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1174
1175 info->pid |= (u64)getpid->pid[i] << sft;
1176 }
1177
1178 out:
1179 i3c_ccc_cmd_dest_cleanup(&dest);
1180
1181 return ret;
1182 }
1183
i3c_master_getbcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1184 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1185 struct i3c_device_info *info)
1186 {
1187 struct i3c_ccc_getbcr *getbcr;
1188 struct i3c_ccc_cmd_dest dest;
1189 struct i3c_ccc_cmd cmd;
1190 int ret;
1191
1192 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1193 if (!getbcr)
1194 return -ENOMEM;
1195
1196 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1197 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1198 if (ret)
1199 goto out;
1200
1201 info->bcr = getbcr->bcr;
1202
1203 out:
1204 i3c_ccc_cmd_dest_cleanup(&dest);
1205
1206 return ret;
1207 }
1208
i3c_master_getdcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1209 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1210 struct i3c_device_info *info)
1211 {
1212 struct i3c_ccc_getdcr *getdcr;
1213 struct i3c_ccc_cmd_dest dest;
1214 struct i3c_ccc_cmd cmd;
1215 int ret;
1216
1217 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1218 if (!getdcr)
1219 return -ENOMEM;
1220
1221 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1222 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1223 if (ret)
1224 goto out;
1225
1226 info->dcr = getdcr->dcr;
1227
1228 out:
1229 i3c_ccc_cmd_dest_cleanup(&dest);
1230
1231 return ret;
1232 }
1233
i3c_master_retrieve_dev_info(struct i3c_dev_desc * dev)1234 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1235 {
1236 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1237 enum i3c_addr_slot_status slot_status;
1238 int ret;
1239
1240 if (!dev->info.dyn_addr)
1241 return -EINVAL;
1242
1243 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1244 dev->info.dyn_addr);
1245 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1246 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1247 return -EINVAL;
1248
1249 ret = i3c_master_getpid_locked(master, &dev->info);
1250 if (ret)
1251 return ret;
1252
1253 ret = i3c_master_getbcr_locked(master, &dev->info);
1254 if (ret)
1255 return ret;
1256
1257 ret = i3c_master_getdcr_locked(master, &dev->info);
1258 if (ret)
1259 return ret;
1260
1261 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1262 ret = i3c_master_getmxds_locked(master, &dev->info);
1263 if (ret)
1264 return ret;
1265 }
1266
1267 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1268 dev->info.max_ibi_len = 1;
1269
1270 i3c_master_getmrl_locked(master, &dev->info);
1271 i3c_master_getmwl_locked(master, &dev->info);
1272
1273 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1274 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1275 if (ret)
1276 return ret;
1277 }
1278
1279 return 0;
1280 }
1281
i3c_master_put_i3c_addrs(struct i3c_dev_desc * dev)1282 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1283 {
1284 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1285
1286 if (dev->info.static_addr)
1287 i3c_bus_set_addr_slot_status(&master->bus,
1288 dev->info.static_addr,
1289 I3C_ADDR_SLOT_FREE);
1290
1291 if (dev->info.dyn_addr)
1292 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1293 I3C_ADDR_SLOT_FREE);
1294
1295 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1296 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1297 I3C_ADDR_SLOT_FREE);
1298 }
1299
i3c_master_get_i3c_addrs(struct i3c_dev_desc * dev)1300 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1301 {
1302 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1303 enum i3c_addr_slot_status status;
1304
1305 if (!dev->info.static_addr && !dev->info.dyn_addr)
1306 return 0;
1307
1308 if (dev->info.static_addr) {
1309 status = i3c_bus_get_addr_slot_status(&master->bus,
1310 dev->info.static_addr);
1311 /* Since static address and assigned dynamic address can be
1312 * equal, allow this case to pass.
1313 */
1314 if (status != I3C_ADDR_SLOT_FREE &&
1315 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1316 return -EBUSY;
1317
1318 i3c_bus_set_addr_slot_status(&master->bus,
1319 dev->info.static_addr,
1320 I3C_ADDR_SLOT_I3C_DEV);
1321 }
1322
1323 /*
1324 * ->init_dyn_addr should have been reserved before that, so, if we're
1325 * trying to apply a pre-reserved dynamic address, we should not try
1326 * to reserve the address slot a second time.
1327 */
1328 if (dev->info.dyn_addr &&
1329 (!dev->boardinfo ||
1330 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1331 status = i3c_bus_get_addr_slot_status(&master->bus,
1332 dev->info.dyn_addr);
1333 if (status != I3C_ADDR_SLOT_FREE)
1334 goto err_release_static_addr;
1335
1336 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1337 I3C_ADDR_SLOT_I3C_DEV);
1338 }
1339
1340 return 0;
1341
1342 err_release_static_addr:
1343 if (dev->info.static_addr)
1344 i3c_bus_set_addr_slot_status(&master->bus,
1345 dev->info.static_addr,
1346 I3C_ADDR_SLOT_FREE);
1347
1348 return -EBUSY;
1349 }
1350
i3c_master_attach_i3c_dev(struct i3c_master_controller * master,struct i3c_dev_desc * dev)1351 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1352 struct i3c_dev_desc *dev)
1353 {
1354 int ret;
1355
1356 /*
1357 * We don't attach devices to the controller until they are
1358 * addressable on the bus.
1359 */
1360 if (!dev->info.static_addr && !dev->info.dyn_addr)
1361 return 0;
1362
1363 ret = i3c_master_get_i3c_addrs(dev);
1364 if (ret)
1365 return ret;
1366
1367 /* Do not attach the master device itself. */
1368 if (master->this != dev && master->ops->attach_i3c_dev) {
1369 ret = master->ops->attach_i3c_dev(dev);
1370 if (ret) {
1371 i3c_master_put_i3c_addrs(dev);
1372 return ret;
1373 }
1374 }
1375
1376 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1377
1378 return 0;
1379 }
1380
i3c_master_reattach_i3c_dev(struct i3c_dev_desc * dev,u8 old_dyn_addr)1381 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1382 u8 old_dyn_addr)
1383 {
1384 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1385 enum i3c_addr_slot_status status;
1386 int ret;
1387
1388 if (dev->info.dyn_addr != old_dyn_addr &&
1389 (!dev->boardinfo ||
1390 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1391 status = i3c_bus_get_addr_slot_status(&master->bus,
1392 dev->info.dyn_addr);
1393 if (status != I3C_ADDR_SLOT_FREE)
1394 return -EBUSY;
1395 i3c_bus_set_addr_slot_status(&master->bus,
1396 dev->info.dyn_addr,
1397 I3C_ADDR_SLOT_I3C_DEV);
1398 if (old_dyn_addr)
1399 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1400 I3C_ADDR_SLOT_FREE);
1401 }
1402
1403 if (master->ops->reattach_i3c_dev) {
1404 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1405 if (ret) {
1406 i3c_master_put_i3c_addrs(dev);
1407 return ret;
1408 }
1409 }
1410
1411 return 0;
1412 }
1413
i3c_master_detach_i3c_dev(struct i3c_dev_desc * dev)1414 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1415 {
1416 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1417
1418 /* Do not detach the master device itself. */
1419 if (master->this != dev && master->ops->detach_i3c_dev)
1420 master->ops->detach_i3c_dev(dev);
1421
1422 i3c_master_put_i3c_addrs(dev);
1423 list_del(&dev->common.node);
1424 }
1425
i3c_master_attach_i2c_dev(struct i3c_master_controller * master,struct i2c_dev_desc * dev)1426 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1427 struct i2c_dev_desc *dev)
1428 {
1429 int ret;
1430
1431 if (master->ops->attach_i2c_dev) {
1432 ret = master->ops->attach_i2c_dev(dev);
1433 if (ret)
1434 return ret;
1435 }
1436
1437 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1438
1439 return 0;
1440 }
1441
i3c_master_detach_i2c_dev(struct i2c_dev_desc * dev)1442 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1443 {
1444 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1445
1446 list_del(&dev->common.node);
1447
1448 if (master->ops->detach_i2c_dev)
1449 master->ops->detach_i2c_dev(dev);
1450 }
1451
i3c_master_early_i3c_dev_add(struct i3c_master_controller * master,struct i3c_dev_boardinfo * boardinfo)1452 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1453 struct i3c_dev_boardinfo *boardinfo)
1454 {
1455 struct i3c_device_info info = {
1456 .static_addr = boardinfo->static_addr,
1457 .pid = boardinfo->pid,
1458 };
1459 struct i3c_dev_desc *i3cdev;
1460 int ret;
1461
1462 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1463 if (IS_ERR(i3cdev))
1464 return -ENOMEM;
1465
1466 i3cdev->boardinfo = boardinfo;
1467
1468 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1469 if (ret)
1470 goto err_free_dev;
1471
1472 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1473 i3cdev->boardinfo->init_dyn_addr);
1474 if (ret)
1475 goto err_detach_dev;
1476
1477 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1478 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1479 if (ret)
1480 goto err_rstdaa;
1481
1482 ret = i3c_master_retrieve_dev_info(i3cdev);
1483 if (ret)
1484 goto err_rstdaa;
1485
1486 return 0;
1487
1488 err_rstdaa:
1489 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1490 err_detach_dev:
1491 i3c_master_detach_i3c_dev(i3cdev);
1492 err_free_dev:
1493 i3c_master_free_i3c_dev(i3cdev);
1494
1495 return ret;
1496 }
1497
1498 static void
i3c_master_register_new_i3c_devs(struct i3c_master_controller * master)1499 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1500 {
1501 struct i3c_dev_desc *desc;
1502 int ret;
1503
1504 if (!master->init_done)
1505 return;
1506
1507 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1508 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1509 continue;
1510
1511 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1512 if (!desc->dev)
1513 continue;
1514
1515 desc->dev->bus = &master->bus;
1516 desc->dev->desc = desc;
1517 desc->dev->dev.parent = &master->dev;
1518 desc->dev->dev.type = &i3c_device_type;
1519 desc->dev->dev.bus = &i3c_bus_type;
1520 desc->dev->dev.release = i3c_device_release;
1521 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1522 desc->info.pid);
1523
1524 if (desc->boardinfo)
1525 desc->dev->dev.of_node = desc->boardinfo->of_node;
1526
1527 ret = device_register(&desc->dev->dev);
1528 if (ret) {
1529 dev_err(&master->dev,
1530 "Failed to add I3C device (err = %d)\n", ret);
1531 put_device(&desc->dev->dev);
1532 }
1533 }
1534 }
1535
1536 /**
1537 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1538 * @master: master doing the DAA
1539 *
1540 * This function is instantiating an I3C device object and adding it to the
1541 * I3C device list. All device information are automatically retrieved using
1542 * standard CCC commands.
1543 *
1544 * The I3C device object is returned in case the master wants to attach
1545 * private data to it using i3c_dev_set_master_data().
1546 *
1547 * This function must be called with the bus lock held in write mode.
1548 *
1549 * Return: a 0 in case of success, an negative error code otherwise.
1550 */
i3c_master_do_daa(struct i3c_master_controller * master)1551 int i3c_master_do_daa(struct i3c_master_controller *master)
1552 {
1553 int ret;
1554
1555 i3c_bus_maintenance_lock(&master->bus);
1556 ret = master->ops->do_daa(master);
1557 i3c_bus_maintenance_unlock(&master->bus);
1558
1559 if (ret)
1560 return ret;
1561
1562 i3c_bus_normaluse_lock(&master->bus);
1563 i3c_master_register_new_i3c_devs(master);
1564 i3c_bus_normaluse_unlock(&master->bus);
1565
1566 return 0;
1567 }
1568 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1569
1570 /**
1571 * i3c_master_set_info() - set master device information
1572 * @master: master used to send frames on the bus
1573 * @info: I3C device information
1574 *
1575 * Set master device info. This should be called from
1576 * &i3c_master_controller_ops->bus_init().
1577 *
1578 * Not all &i3c_device_info fields are meaningful for a master device.
1579 * Here is a list of fields that should be properly filled:
1580 *
1581 * - &i3c_device_info->dyn_addr
1582 * - &i3c_device_info->bcr
1583 * - &i3c_device_info->dcr
1584 * - &i3c_device_info->pid
1585 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1586 * &i3c_device_info->bcr
1587 *
1588 * This function must be called with the bus lock held in maintenance mode.
1589 *
1590 * Return: 0 if @info contains valid information (not every piece of
1591 * information can be checked, but we can at least make sure @info->dyn_addr
1592 * and @info->bcr are correct), -EINVAL otherwise.
1593 */
i3c_master_set_info(struct i3c_master_controller * master,const struct i3c_device_info * info)1594 int i3c_master_set_info(struct i3c_master_controller *master,
1595 const struct i3c_device_info *info)
1596 {
1597 struct i3c_dev_desc *i3cdev;
1598 int ret;
1599
1600 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1601 return -EINVAL;
1602
1603 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1604 master->secondary)
1605 return -EINVAL;
1606
1607 if (master->this)
1608 return -EINVAL;
1609
1610 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1611 if (IS_ERR(i3cdev))
1612 return PTR_ERR(i3cdev);
1613
1614 master->this = i3cdev;
1615 master->bus.cur_master = master->this;
1616
1617 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1618 if (ret)
1619 goto err_free_dev;
1620
1621 return 0;
1622
1623 err_free_dev:
1624 i3c_master_free_i3c_dev(i3cdev);
1625
1626 return ret;
1627 }
1628 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1629
i3c_master_detach_free_devs(struct i3c_master_controller * master)1630 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1631 {
1632 struct i3c_dev_desc *i3cdev, *i3ctmp;
1633 struct i2c_dev_desc *i2cdev, *i2ctmp;
1634
1635 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1636 common.node) {
1637 i3c_master_detach_i3c_dev(i3cdev);
1638
1639 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1640 i3c_bus_set_addr_slot_status(&master->bus,
1641 i3cdev->boardinfo->init_dyn_addr,
1642 I3C_ADDR_SLOT_FREE);
1643
1644 i3c_master_free_i3c_dev(i3cdev);
1645 }
1646
1647 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1648 common.node) {
1649 i3c_master_detach_i2c_dev(i2cdev);
1650 i3c_bus_set_addr_slot_status(&master->bus,
1651 i2cdev->addr,
1652 I3C_ADDR_SLOT_FREE);
1653 i3c_master_free_i2c_dev(i2cdev);
1654 }
1655 }
1656
1657 /**
1658 * i3c_master_bus_init() - initialize an I3C bus
1659 * @master: main master initializing the bus
1660 *
1661 * This function is following all initialisation steps described in the I3C
1662 * specification:
1663 *
1664 * 1. Attach I2C devs to the master so that the master can fill its internal
1665 * device table appropriately
1666 *
1667 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1668 * the master controller. That's usually where the bus mode is selected
1669 * (pure bus or mixed fast/slow bus)
1670 *
1671 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1672 * particularly important when the bus was previously configured by someone
1673 * else (for example the bootloader)
1674 *
1675 * 4. Disable all slave events.
1676 *
1677 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1678 * also have static_addr, try to pre-assign dynamic addresses requested by
1679 * the FW with SETDASA and attach corresponding statically defined I3C
1680 * devices to the master.
1681 *
1682 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1683 * remaining I3C devices
1684 *
1685 * Once this is done, all I3C and I2C devices should be usable.
1686 *
1687 * Return: a 0 in case of success, an negative error code otherwise.
1688 */
i3c_master_bus_init(struct i3c_master_controller * master)1689 static int i3c_master_bus_init(struct i3c_master_controller *master)
1690 {
1691 enum i3c_addr_slot_status status;
1692 struct i2c_dev_boardinfo *i2cboardinfo;
1693 struct i3c_dev_boardinfo *i3cboardinfo;
1694 struct i2c_dev_desc *i2cdev;
1695 int ret;
1696
1697 /*
1698 * First attach all devices with static definitions provided by the
1699 * FW.
1700 */
1701 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1702 status = i3c_bus_get_addr_slot_status(&master->bus,
1703 i2cboardinfo->base.addr);
1704 if (status != I3C_ADDR_SLOT_FREE) {
1705 ret = -EBUSY;
1706 goto err_detach_devs;
1707 }
1708
1709 i3c_bus_set_addr_slot_status(&master->bus,
1710 i2cboardinfo->base.addr,
1711 I3C_ADDR_SLOT_I2C_DEV);
1712
1713 i2cdev = i3c_master_alloc_i2c_dev(master,
1714 i2cboardinfo->base.addr,
1715 i2cboardinfo->lvr);
1716 if (IS_ERR(i2cdev)) {
1717 ret = PTR_ERR(i2cdev);
1718 goto err_detach_devs;
1719 }
1720
1721 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1722 if (ret) {
1723 i3c_master_free_i2c_dev(i2cdev);
1724 goto err_detach_devs;
1725 }
1726 }
1727
1728 /*
1729 * Now execute the controller specific ->bus_init() routine, which
1730 * might configure its internal logic to match the bus limitations.
1731 */
1732 ret = master->ops->bus_init(master);
1733 if (ret)
1734 goto err_detach_devs;
1735
1736 /*
1737 * The master device should have been instantiated in ->bus_init(),
1738 * complain if this was not the case.
1739 */
1740 if (!master->this) {
1741 dev_err(&master->dev,
1742 "master_set_info() was not called in ->bus_init()\n");
1743 ret = -EINVAL;
1744 goto err_bus_cleanup;
1745 }
1746
1747 /*
1748 * Reset all dynamic address that may have been assigned before
1749 * (assigned by the bootloader for example).
1750 */
1751 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1752 if (ret && ret != I3C_ERROR_M2)
1753 goto err_bus_cleanup;
1754
1755 /* Disable all slave events before starting DAA. */
1756 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1757 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1758 I3C_CCC_EVENT_HJ);
1759 if (ret && ret != I3C_ERROR_M2)
1760 goto err_bus_cleanup;
1761
1762 /*
1763 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1764 * address and retrieve device information if needed.
1765 * In case pre-assign dynamic address fails, setting dynamic address to
1766 * the requested init_dyn_addr is retried after DAA is done in
1767 * i3c_master_add_i3c_dev_locked().
1768 */
1769 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1770
1771 /*
1772 * We don't reserve a dynamic address for devices that
1773 * don't explicitly request one.
1774 */
1775 if (!i3cboardinfo->init_dyn_addr)
1776 continue;
1777
1778 ret = i3c_bus_get_addr_slot_status(&master->bus,
1779 i3cboardinfo->init_dyn_addr);
1780 if (ret != I3C_ADDR_SLOT_FREE) {
1781 ret = -EBUSY;
1782 goto err_rstdaa;
1783 }
1784
1785 i3c_bus_set_addr_slot_status(&master->bus,
1786 i3cboardinfo->init_dyn_addr,
1787 I3C_ADDR_SLOT_I3C_DEV);
1788
1789 /*
1790 * Only try to create/attach devices that have a static
1791 * address. Other devices will be created/attached when
1792 * DAA happens, and the requested dynamic address will
1793 * be set using SETNEWDA once those devices become
1794 * addressable.
1795 */
1796
1797 if (i3cboardinfo->static_addr)
1798 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1799 }
1800
1801 ret = i3c_master_do_daa(master);
1802 if (ret)
1803 goto err_rstdaa;
1804
1805 return 0;
1806
1807 err_rstdaa:
1808 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1809
1810 err_bus_cleanup:
1811 if (master->ops->bus_cleanup)
1812 master->ops->bus_cleanup(master);
1813
1814 err_detach_devs:
1815 i3c_master_detach_free_devs(master);
1816
1817 return ret;
1818 }
1819
i3c_master_bus_cleanup(struct i3c_master_controller * master)1820 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1821 {
1822 if (master->ops->bus_cleanup)
1823 master->ops->bus_cleanup(master);
1824
1825 i3c_master_detach_free_devs(master);
1826 }
1827
i3c_master_attach_boardinfo(struct i3c_dev_desc * i3cdev)1828 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1829 {
1830 struct i3c_master_controller *master = i3cdev->common.master;
1831 struct i3c_dev_boardinfo *i3cboardinfo;
1832
1833 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1834 if (i3cdev->info.pid != i3cboardinfo->pid)
1835 continue;
1836
1837 i3cdev->boardinfo = i3cboardinfo;
1838 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1839 return;
1840 }
1841 }
1842
1843 static struct i3c_dev_desc *
i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc * refdev)1844 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1845 {
1846 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1847 struct i3c_dev_desc *i3cdev;
1848
1849 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1850 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1851 return i3cdev;
1852 }
1853
1854 return NULL;
1855 }
1856
1857 /**
1858 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1859 * @master: master used to send frames on the bus
1860 * @addr: I3C slave dynamic address assigned to the device
1861 *
1862 * This function is instantiating an I3C device object and adding it to the
1863 * I3C device list. All device information are automatically retrieved using
1864 * standard CCC commands.
1865 *
1866 * The I3C device object is returned in case the master wants to attach
1867 * private data to it using i3c_dev_set_master_data().
1868 *
1869 * This function must be called with the bus lock held in write mode.
1870 *
1871 * Return: a 0 in case of success, an negative error code otherwise.
1872 */
i3c_master_add_i3c_dev_locked(struct i3c_master_controller * master,u8 addr)1873 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1874 u8 addr)
1875 {
1876 struct i3c_device_info info = { .dyn_addr = addr };
1877 struct i3c_dev_desc *newdev, *olddev;
1878 u8 old_dyn_addr = addr, expected_dyn_addr;
1879 struct i3c_ibi_setup ibireq = { };
1880 bool enable_ibi = false;
1881 int ret;
1882
1883 if (!master)
1884 return -EINVAL;
1885
1886 newdev = i3c_master_alloc_i3c_dev(master, &info);
1887 if (IS_ERR(newdev))
1888 return PTR_ERR(newdev);
1889
1890 ret = i3c_master_attach_i3c_dev(master, newdev);
1891 if (ret)
1892 goto err_free_dev;
1893
1894 ret = i3c_master_retrieve_dev_info(newdev);
1895 if (ret)
1896 goto err_detach_dev;
1897
1898 i3c_master_attach_boardinfo(newdev);
1899
1900 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1901 if (olddev) {
1902 newdev->dev = olddev->dev;
1903 if (newdev->dev)
1904 newdev->dev->desc = newdev;
1905
1906 /*
1907 * We need to restore the IBI state too, so let's save the
1908 * IBI information and try to restore them after olddev has
1909 * been detached+released and its IBI has been stopped and
1910 * the associated resources have been freed.
1911 */
1912 mutex_lock(&olddev->ibi_lock);
1913 if (olddev->ibi) {
1914 ibireq.handler = olddev->ibi->handler;
1915 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1916 ibireq.num_slots = olddev->ibi->num_slots;
1917
1918 if (olddev->ibi->enabled) {
1919 enable_ibi = true;
1920 i3c_dev_disable_ibi_locked(olddev);
1921 }
1922
1923 i3c_dev_free_ibi_locked(olddev);
1924 }
1925 mutex_unlock(&olddev->ibi_lock);
1926
1927 old_dyn_addr = olddev->info.dyn_addr;
1928
1929 i3c_master_detach_i3c_dev(olddev);
1930 i3c_master_free_i3c_dev(olddev);
1931 }
1932
1933 /*
1934 * Depending on our previous state, the expected dynamic address might
1935 * differ:
1936 * - if the device already had a dynamic address assigned, let's try to
1937 * re-apply this one
1938 * - if the device did not have a dynamic address and the firmware
1939 * requested a specific address, pick this one
1940 * - in any other case, keep the address automatically assigned by the
1941 * master
1942 */
1943 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1944 expected_dyn_addr = old_dyn_addr;
1945 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1946 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1947 else
1948 expected_dyn_addr = newdev->info.dyn_addr;
1949
1950 if (newdev->info.dyn_addr != expected_dyn_addr) {
1951 /*
1952 * Try to apply the expected dynamic address. If it fails, keep
1953 * the address assigned by the master.
1954 */
1955 ret = i3c_master_setnewda_locked(master,
1956 newdev->info.dyn_addr,
1957 expected_dyn_addr);
1958 if (!ret) {
1959 old_dyn_addr = newdev->info.dyn_addr;
1960 newdev->info.dyn_addr = expected_dyn_addr;
1961 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1962 } else {
1963 dev_err(&master->dev,
1964 "Failed to assign reserved/old address to device %d%llx",
1965 master->bus.id, newdev->info.pid);
1966 }
1967 }
1968
1969 /*
1970 * Now is time to try to restore the IBI setup. If we're lucky,
1971 * everything works as before, otherwise, all we can do is complain.
1972 * FIXME: maybe we should add callback to inform the driver that it
1973 * should request the IBI again instead of trying to hide that from
1974 * him.
1975 */
1976 if (ibireq.handler) {
1977 mutex_lock(&newdev->ibi_lock);
1978 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1979 if (ret) {
1980 dev_err(&master->dev,
1981 "Failed to request IBI on device %d-%llx",
1982 master->bus.id, newdev->info.pid);
1983 } else if (enable_ibi) {
1984 ret = i3c_dev_enable_ibi_locked(newdev);
1985 if (ret)
1986 dev_err(&master->dev,
1987 "Failed to re-enable IBI on device %d-%llx",
1988 master->bus.id, newdev->info.pid);
1989 }
1990 mutex_unlock(&newdev->ibi_lock);
1991 }
1992
1993 return 0;
1994
1995 err_detach_dev:
1996 if (newdev->dev && newdev->dev->desc)
1997 newdev->dev->desc = NULL;
1998
1999 i3c_master_detach_i3c_dev(newdev);
2000
2001 err_free_dev:
2002 i3c_master_free_i3c_dev(newdev);
2003
2004 return ret;
2005 }
2006 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2007
2008 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2009
2010 static int
of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2011 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2012 struct device_node *node, u32 *reg)
2013 {
2014 struct i2c_dev_boardinfo *boardinfo;
2015 struct device *dev = &master->dev;
2016 int ret;
2017
2018 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2019 if (!boardinfo)
2020 return -ENOMEM;
2021
2022 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2023 if (ret)
2024 return ret;
2025
2026 /*
2027 * The I3C Specification does not clearly say I2C devices with 10-bit
2028 * address are supported. These devices can't be passed properly through
2029 * DEFSLVS command.
2030 */
2031 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2032 dev_err(dev, "I2C device with 10 bit address not supported.");
2033 return -ENOTSUPP;
2034 }
2035
2036 /* LVR is encoded in reg[2]. */
2037 boardinfo->lvr = reg[2];
2038
2039 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2040 of_node_get(node);
2041
2042 return 0;
2043 }
2044
2045 static int
of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2046 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2047 struct device_node *node, u32 *reg)
2048 {
2049 struct i3c_dev_boardinfo *boardinfo;
2050 struct device *dev = &master->dev;
2051 enum i3c_addr_slot_status addrstatus;
2052 u32 init_dyn_addr = 0;
2053
2054 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2055 if (!boardinfo)
2056 return -ENOMEM;
2057
2058 if (reg[0]) {
2059 if (reg[0] > I3C_MAX_ADDR)
2060 return -EINVAL;
2061
2062 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2063 reg[0]);
2064 if (addrstatus != I3C_ADDR_SLOT_FREE)
2065 return -EINVAL;
2066 }
2067
2068 boardinfo->static_addr = reg[0];
2069
2070 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2071 if (init_dyn_addr > I3C_MAX_ADDR)
2072 return -EINVAL;
2073
2074 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2075 init_dyn_addr);
2076 if (addrstatus != I3C_ADDR_SLOT_FREE)
2077 return -EINVAL;
2078 }
2079
2080 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2081
2082 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2083 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2084 return -EINVAL;
2085
2086 boardinfo->init_dyn_addr = init_dyn_addr;
2087 boardinfo->of_node = of_node_get(node);
2088 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2089
2090 return 0;
2091 }
2092
of_i3c_master_add_dev(struct i3c_master_controller * master,struct device_node * node)2093 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2094 struct device_node *node)
2095 {
2096 u32 reg[3];
2097 int ret;
2098
2099 if (!master || !node)
2100 return -EINVAL;
2101
2102 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2103 if (ret)
2104 return ret;
2105
2106 /*
2107 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2108 * dealing with an I2C device.
2109 */
2110 if (!reg[1])
2111 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2112 else
2113 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2114
2115 return ret;
2116 }
2117
of_populate_i3c_bus(struct i3c_master_controller * master)2118 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2119 {
2120 struct device *dev = &master->dev;
2121 struct device_node *i3cbus_np = dev->of_node;
2122 struct device_node *node;
2123 int ret;
2124 u32 val;
2125
2126 if (!i3cbus_np)
2127 return 0;
2128
2129 for_each_available_child_of_node(i3cbus_np, node) {
2130 ret = of_i3c_master_add_dev(master, node);
2131 if (ret) {
2132 of_node_put(node);
2133 return ret;
2134 }
2135 }
2136
2137 /*
2138 * The user might want to limit I2C and I3C speed in case some devices
2139 * on the bus are not supporting typical rates, or if the bus topology
2140 * prevents it from using max possible rate.
2141 */
2142 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2143 master->bus.scl_rate.i2c = val;
2144
2145 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2146 master->bus.scl_rate.i3c = val;
2147
2148 return 0;
2149 }
2150
i3c_master_i2c_adapter_xfer(struct i2c_adapter * adap,struct i2c_msg * xfers,int nxfers)2151 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2152 struct i2c_msg *xfers, int nxfers)
2153 {
2154 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2155 struct i2c_dev_desc *dev;
2156 int i, ret;
2157 u16 addr;
2158
2159 if (!xfers || !master || nxfers <= 0)
2160 return -EINVAL;
2161
2162 if (!master->ops->i2c_xfers)
2163 return -ENOTSUPP;
2164
2165 /* Doing transfers to different devices is not supported. */
2166 addr = xfers[0].addr;
2167 for (i = 1; i < nxfers; i++) {
2168 if (addr != xfers[i].addr)
2169 return -ENOTSUPP;
2170 }
2171
2172 i3c_bus_normaluse_lock(&master->bus);
2173 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2174 if (!dev)
2175 ret = -ENOENT;
2176 else
2177 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2178 i3c_bus_normaluse_unlock(&master->bus);
2179
2180 return ret ? ret : nxfers;
2181 }
2182
i3c_master_i2c_funcs(struct i2c_adapter * adapter)2183 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2184 {
2185 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2186 }
2187
i3c_master_i2c_get_lvr(struct i2c_client * client)2188 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2189 {
2190 /* Fall back to no spike filters and FM bus mode. */
2191 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2192
2193 if (client->dev.of_node) {
2194 u32 reg[3];
2195
2196 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2197 reg, ARRAY_SIZE(reg)))
2198 lvr = reg[2];
2199 }
2200
2201 return lvr;
2202 }
2203
i3c_master_i2c_attach(struct i2c_adapter * adap,struct i2c_client * client)2204 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2205 {
2206 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2207 enum i3c_addr_slot_status status;
2208 struct i2c_dev_desc *i2cdev;
2209 int ret;
2210
2211 /* Already added by board info? */
2212 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2213 return 0;
2214
2215 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2216 if (status != I3C_ADDR_SLOT_FREE)
2217 return -EBUSY;
2218
2219 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2220 I3C_ADDR_SLOT_I2C_DEV);
2221
2222 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2223 i3c_master_i2c_get_lvr(client));
2224 if (IS_ERR(i2cdev)) {
2225 ret = PTR_ERR(i2cdev);
2226 goto out_clear_status;
2227 }
2228
2229 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2230 if (ret)
2231 goto out_free_dev;
2232
2233 return 0;
2234
2235 out_free_dev:
2236 i3c_master_free_i2c_dev(i2cdev);
2237 out_clear_status:
2238 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2239 I3C_ADDR_SLOT_FREE);
2240
2241 return ret;
2242 }
2243
i3c_master_i2c_detach(struct i2c_adapter * adap,struct i2c_client * client)2244 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2245 {
2246 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2247 struct i2c_dev_desc *dev;
2248
2249 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2250 if (!dev)
2251 return -ENODEV;
2252
2253 i3c_master_detach_i2c_dev(dev);
2254 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2255 I3C_ADDR_SLOT_FREE);
2256 i3c_master_free_i2c_dev(dev);
2257
2258 return 0;
2259 }
2260
2261 static const struct i2c_algorithm i3c_master_i2c_algo = {
2262 .master_xfer = i3c_master_i2c_adapter_xfer,
2263 .functionality = i3c_master_i2c_funcs,
2264 };
2265
i3c_i2c_notifier_call(struct notifier_block * nb,unsigned long action,void * data)2266 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2267 void *data)
2268 {
2269 struct i2c_adapter *adap;
2270 struct i2c_client *client;
2271 struct device *dev = data;
2272 struct i3c_master_controller *master;
2273 int ret;
2274
2275 if (dev->type != &i2c_client_type)
2276 return 0;
2277
2278 client = to_i2c_client(dev);
2279 adap = client->adapter;
2280
2281 if (adap->algo != &i3c_master_i2c_algo)
2282 return 0;
2283
2284 master = i2c_adapter_to_i3c_master(adap);
2285
2286 i3c_bus_maintenance_lock(&master->bus);
2287 switch (action) {
2288 case BUS_NOTIFY_ADD_DEVICE:
2289 ret = i3c_master_i2c_attach(adap, client);
2290 break;
2291 case BUS_NOTIFY_DEL_DEVICE:
2292 ret = i3c_master_i2c_detach(adap, client);
2293 break;
2294 }
2295 i3c_bus_maintenance_unlock(&master->bus);
2296
2297 return ret;
2298 }
2299
2300 static struct notifier_block i2cdev_notifier = {
2301 .notifier_call = i3c_i2c_notifier_call,
2302 };
2303
i3c_master_i2c_adapter_init(struct i3c_master_controller * master)2304 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2305 {
2306 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2307 struct i2c_dev_desc *i2cdev;
2308 struct i2c_dev_boardinfo *i2cboardinfo;
2309 int ret;
2310
2311 adap->dev.parent = master->dev.parent;
2312 adap->owner = master->dev.parent->driver->owner;
2313 adap->algo = &i3c_master_i2c_algo;
2314 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2315
2316 /* FIXME: Should we allow i3c masters to override these values? */
2317 adap->timeout = 1000;
2318 adap->retries = 3;
2319
2320 ret = i2c_add_adapter(adap);
2321 if (ret)
2322 return ret;
2323
2324 /*
2325 * We silently ignore failures here. The bus should keep working
2326 * correctly even if one or more i2c devices are not registered.
2327 */
2328 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2329 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2330 i2cboardinfo->base.addr);
2331 if (WARN_ON(!i2cdev))
2332 continue;
2333 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2334 }
2335
2336 return 0;
2337 }
2338
i3c_master_i2c_adapter_cleanup(struct i3c_master_controller * master)2339 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2340 {
2341 struct i2c_dev_desc *i2cdev;
2342
2343 i2c_del_adapter(&master->i2c);
2344
2345 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2346 i2cdev->dev = NULL;
2347 }
2348
i3c_master_unregister_i3c_devs(struct i3c_master_controller * master)2349 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2350 {
2351 struct i3c_dev_desc *i3cdev;
2352
2353 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2354 if (!i3cdev->dev)
2355 continue;
2356
2357 i3cdev->dev->desc = NULL;
2358 if (device_is_registered(&i3cdev->dev->dev))
2359 device_unregister(&i3cdev->dev->dev);
2360 else
2361 put_device(&i3cdev->dev->dev);
2362 i3cdev->dev = NULL;
2363 }
2364 }
2365
2366 /**
2367 * i3c_master_queue_ibi() - Queue an IBI
2368 * @dev: the device this IBI is coming from
2369 * @slot: the IBI slot used to store the payload
2370 *
2371 * Queue an IBI to the controller workqueue. The IBI handler attached to
2372 * the dev will be called from a workqueue context.
2373 */
i3c_master_queue_ibi(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2374 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2375 {
2376 atomic_inc(&dev->ibi->pending_ibis);
2377 queue_work(dev->common.master->wq, &slot->work);
2378 }
2379 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2380
i3c_master_handle_ibi(struct work_struct * work)2381 static void i3c_master_handle_ibi(struct work_struct *work)
2382 {
2383 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2384 work);
2385 struct i3c_dev_desc *dev = slot->dev;
2386 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2387 struct i3c_ibi_payload payload;
2388
2389 payload.data = slot->data;
2390 payload.len = slot->len;
2391
2392 if (dev->dev)
2393 dev->ibi->handler(dev->dev, &payload);
2394
2395 master->ops->recycle_ibi_slot(dev, slot);
2396 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2397 complete(&dev->ibi->all_ibis_handled);
2398 }
2399
i3c_master_init_ibi_slot(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2400 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2401 struct i3c_ibi_slot *slot)
2402 {
2403 slot->dev = dev;
2404 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2405 }
2406
2407 struct i3c_generic_ibi_slot {
2408 struct list_head node;
2409 struct i3c_ibi_slot base;
2410 };
2411
2412 struct i3c_generic_ibi_pool {
2413 spinlock_t lock;
2414 unsigned int num_slots;
2415 struct i3c_generic_ibi_slot *slots;
2416 void *payload_buf;
2417 struct list_head free_slots;
2418 struct list_head pending;
2419 };
2420
2421 /**
2422 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2423 * @pool: the IBI pool to free
2424 *
2425 * Free all IBI slots allated by a generic IBI pool.
2426 */
i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool * pool)2427 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2428 {
2429 struct i3c_generic_ibi_slot *slot;
2430 unsigned int nslots = 0;
2431
2432 while (!list_empty(&pool->free_slots)) {
2433 slot = list_first_entry(&pool->free_slots,
2434 struct i3c_generic_ibi_slot, node);
2435 list_del(&slot->node);
2436 nslots++;
2437 }
2438
2439 /*
2440 * If the number of freed slots is not equal to the number of allocated
2441 * slots we have a leak somewhere.
2442 */
2443 WARN_ON(nslots != pool->num_slots);
2444
2445 kfree(pool->payload_buf);
2446 kfree(pool->slots);
2447 kfree(pool);
2448 }
2449 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2450
2451 /**
2452 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2453 * @dev: the device this pool will be used for
2454 * @req: IBI setup request describing what the device driver expects
2455 *
2456 * Create a generic IBI pool based on the information provided in @req.
2457 *
2458 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2459 */
2460 struct i3c_generic_ibi_pool *
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2461 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2462 const struct i3c_ibi_setup *req)
2463 {
2464 struct i3c_generic_ibi_pool *pool;
2465 struct i3c_generic_ibi_slot *slot;
2466 unsigned int i;
2467 int ret;
2468
2469 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2470 if (!pool)
2471 return ERR_PTR(-ENOMEM);
2472
2473 spin_lock_init(&pool->lock);
2474 INIT_LIST_HEAD(&pool->free_slots);
2475 INIT_LIST_HEAD(&pool->pending);
2476
2477 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2478 if (!pool->slots) {
2479 ret = -ENOMEM;
2480 goto err_free_pool;
2481 }
2482
2483 if (req->max_payload_len) {
2484 pool->payload_buf = kcalloc(req->num_slots,
2485 req->max_payload_len, GFP_KERNEL);
2486 if (!pool->payload_buf) {
2487 ret = -ENOMEM;
2488 goto err_free_pool;
2489 }
2490 }
2491
2492 for (i = 0; i < req->num_slots; i++) {
2493 slot = &pool->slots[i];
2494 i3c_master_init_ibi_slot(dev, &slot->base);
2495
2496 if (req->max_payload_len)
2497 slot->base.data = pool->payload_buf +
2498 (i * req->max_payload_len);
2499
2500 list_add_tail(&slot->node, &pool->free_slots);
2501 pool->num_slots++;
2502 }
2503
2504 return pool;
2505
2506 err_free_pool:
2507 i3c_generic_ibi_free_pool(pool);
2508 return ERR_PTR(ret);
2509 }
2510 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2511
2512 /**
2513 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2514 * @pool: the pool to query an IBI slot on
2515 *
2516 * Search for a free slot in a generic IBI pool.
2517 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2518 * when it's no longer needed.
2519 *
2520 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2521 */
2522 struct i3c_ibi_slot *
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool * pool)2523 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2524 {
2525 struct i3c_generic_ibi_slot *slot;
2526 unsigned long flags;
2527
2528 spin_lock_irqsave(&pool->lock, flags);
2529 slot = list_first_entry_or_null(&pool->free_slots,
2530 struct i3c_generic_ibi_slot, node);
2531 if (slot)
2532 list_del(&slot->node);
2533 spin_unlock_irqrestore(&pool->lock, flags);
2534
2535 return slot ? &slot->base : NULL;
2536 }
2537 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2538
2539 /**
2540 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2541 * @pool: the pool to return the IBI slot to
2542 * @s: IBI slot to recycle
2543 *
2544 * Add an IBI slot back to its generic IBI pool. Should be called from the
2545 * master driver struct_master_controller_ops->recycle_ibi() method.
2546 */
i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool * pool,struct i3c_ibi_slot * s)2547 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2548 struct i3c_ibi_slot *s)
2549 {
2550 struct i3c_generic_ibi_slot *slot;
2551 unsigned long flags;
2552
2553 if (!s)
2554 return;
2555
2556 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2557 spin_lock_irqsave(&pool->lock, flags);
2558 list_add_tail(&slot->node, &pool->free_slots);
2559 spin_unlock_irqrestore(&pool->lock, flags);
2560 }
2561 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2562
i3c_master_check_ops(const struct i3c_master_controller_ops * ops)2563 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2564 {
2565 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2566 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2567 return -EINVAL;
2568
2569 if (ops->request_ibi &&
2570 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2571 !ops->recycle_ibi_slot))
2572 return -EINVAL;
2573
2574 return 0;
2575 }
2576
2577 /**
2578 * i3c_master_register() - register an I3C master
2579 * @master: master used to send frames on the bus
2580 * @parent: the parent device (the one that provides this I3C master
2581 * controller)
2582 * @ops: the master controller operations
2583 * @secondary: true if you are registering a secondary master. Will return
2584 * -ENOTSUPP if set to true since secondary masters are not yet
2585 * supported
2586 *
2587 * This function takes care of everything for you:
2588 *
2589 * - creates and initializes the I3C bus
2590 * - populates the bus with static I2C devs if @parent->of_node is not
2591 * NULL
2592 * - registers all I3C devices added by the controller during bus
2593 * initialization
2594 * - registers the I2C adapter and all I2C devices
2595 *
2596 * Return: 0 in case of success, a negative error code otherwise.
2597 */
i3c_master_register(struct i3c_master_controller * master,struct device * parent,const struct i3c_master_controller_ops * ops,bool secondary)2598 int i3c_master_register(struct i3c_master_controller *master,
2599 struct device *parent,
2600 const struct i3c_master_controller_ops *ops,
2601 bool secondary)
2602 {
2603 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2604 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2605 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2606 struct i2c_dev_boardinfo *i2cbi;
2607 int ret;
2608
2609 /* We do not support secondary masters yet. */
2610 if (secondary)
2611 return -ENOTSUPP;
2612
2613 ret = i3c_master_check_ops(ops);
2614 if (ret)
2615 return ret;
2616
2617 master->dev.parent = parent;
2618 master->dev.of_node = of_node_get(parent->of_node);
2619 master->dev.bus = &i3c_bus_type;
2620 master->dev.type = &i3c_masterdev_type;
2621 master->dev.release = i3c_masterdev_release;
2622 master->ops = ops;
2623 master->secondary = secondary;
2624 INIT_LIST_HEAD(&master->boardinfo.i2c);
2625 INIT_LIST_HEAD(&master->boardinfo.i3c);
2626
2627 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2628 if (ret)
2629 return ret;
2630
2631 device_initialize(&master->dev);
2632 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2633
2634 ret = of_populate_i3c_bus(master);
2635 if (ret)
2636 goto err_put_dev;
2637
2638 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2639 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2640 case I3C_LVR_I2C_INDEX(0):
2641 if (mode < I3C_BUS_MODE_MIXED_FAST)
2642 mode = I3C_BUS_MODE_MIXED_FAST;
2643 break;
2644 case I3C_LVR_I2C_INDEX(1):
2645 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2646 mode = I3C_BUS_MODE_MIXED_LIMITED;
2647 break;
2648 case I3C_LVR_I2C_INDEX(2):
2649 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2650 mode = I3C_BUS_MODE_MIXED_SLOW;
2651 break;
2652 default:
2653 ret = -EINVAL;
2654 goto err_put_dev;
2655 }
2656
2657 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2658 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2659 }
2660
2661 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2662 if (ret)
2663 goto err_put_dev;
2664
2665 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2666 if (!master->wq) {
2667 ret = -ENOMEM;
2668 goto err_put_dev;
2669 }
2670
2671 ret = i3c_master_bus_init(master);
2672 if (ret)
2673 goto err_put_dev;
2674
2675 ret = device_add(&master->dev);
2676 if (ret)
2677 goto err_cleanup_bus;
2678
2679 /*
2680 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2681 * through the I2C subsystem.
2682 */
2683 ret = i3c_master_i2c_adapter_init(master);
2684 if (ret)
2685 goto err_del_dev;
2686
2687 /*
2688 * We're done initializing the bus and the controller, we can now
2689 * register I3C devices discovered during the initial DAA.
2690 */
2691 master->init_done = true;
2692 i3c_bus_normaluse_lock(&master->bus);
2693 i3c_master_register_new_i3c_devs(master);
2694 i3c_bus_normaluse_unlock(&master->bus);
2695
2696 return 0;
2697
2698 err_del_dev:
2699 device_del(&master->dev);
2700
2701 err_cleanup_bus:
2702 i3c_master_bus_cleanup(master);
2703
2704 err_put_dev:
2705 put_device(&master->dev);
2706
2707 return ret;
2708 }
2709 EXPORT_SYMBOL_GPL(i3c_master_register);
2710
2711 /**
2712 * i3c_master_unregister() - unregister an I3C master
2713 * @master: master used to send frames on the bus
2714 *
2715 * Basically undo everything done in i3c_master_register().
2716 */
i3c_master_unregister(struct i3c_master_controller * master)2717 void i3c_master_unregister(struct i3c_master_controller *master)
2718 {
2719 i3c_master_i2c_adapter_cleanup(master);
2720 i3c_master_unregister_i3c_devs(master);
2721 i3c_master_bus_cleanup(master);
2722 device_unregister(&master->dev);
2723 }
2724 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2725
i3c_dev_setdasa_locked(struct i3c_dev_desc * dev)2726 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2727 {
2728 struct i3c_master_controller *master;
2729
2730 if (!dev)
2731 return -ENOENT;
2732
2733 master = i3c_dev_get_master(dev);
2734 if (!master)
2735 return -EINVAL;
2736
2737 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2738 !dev->boardinfo->static_addr)
2739 return -EINVAL;
2740
2741 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2742 dev->boardinfo->init_dyn_addr);
2743 }
2744
i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc * dev,struct i3c_priv_xfer * xfers,int nxfers)2745 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2746 struct i3c_priv_xfer *xfers,
2747 int nxfers)
2748 {
2749 struct i3c_master_controller *master;
2750
2751 if (!dev)
2752 return -ENOENT;
2753
2754 master = i3c_dev_get_master(dev);
2755 if (!master || !xfers)
2756 return -EINVAL;
2757
2758 if (!master->ops->priv_xfers)
2759 return -ENOTSUPP;
2760
2761 return master->ops->priv_xfers(dev, xfers, nxfers);
2762 }
2763
i3c_dev_disable_ibi_locked(struct i3c_dev_desc * dev)2764 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2765 {
2766 struct i3c_master_controller *master;
2767 int ret;
2768
2769 if (!dev->ibi)
2770 return -EINVAL;
2771
2772 master = i3c_dev_get_master(dev);
2773 ret = master->ops->disable_ibi(dev);
2774 if (ret)
2775 return ret;
2776
2777 reinit_completion(&dev->ibi->all_ibis_handled);
2778 if (atomic_read(&dev->ibi->pending_ibis))
2779 wait_for_completion(&dev->ibi->all_ibis_handled);
2780
2781 dev->ibi->enabled = false;
2782
2783 return 0;
2784 }
2785
i3c_dev_enable_ibi_locked(struct i3c_dev_desc * dev)2786 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2787 {
2788 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2789 int ret;
2790
2791 if (!dev->ibi)
2792 return -EINVAL;
2793
2794 ret = master->ops->enable_ibi(dev);
2795 if (!ret)
2796 dev->ibi->enabled = true;
2797
2798 return ret;
2799 }
2800
i3c_dev_request_ibi_locked(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2801 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2802 const struct i3c_ibi_setup *req)
2803 {
2804 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2805 struct i3c_device_ibi_info *ibi;
2806 int ret;
2807
2808 if (!master->ops->request_ibi)
2809 return -ENOTSUPP;
2810
2811 if (dev->ibi)
2812 return -EBUSY;
2813
2814 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2815 if (!ibi)
2816 return -ENOMEM;
2817
2818 atomic_set(&ibi->pending_ibis, 0);
2819 init_completion(&ibi->all_ibis_handled);
2820 ibi->handler = req->handler;
2821 ibi->max_payload_len = req->max_payload_len;
2822 ibi->num_slots = req->num_slots;
2823
2824 dev->ibi = ibi;
2825 ret = master->ops->request_ibi(dev, req);
2826 if (ret) {
2827 kfree(ibi);
2828 dev->ibi = NULL;
2829 }
2830
2831 return ret;
2832 }
2833
i3c_dev_free_ibi_locked(struct i3c_dev_desc * dev)2834 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2835 {
2836 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2837
2838 if (!dev->ibi)
2839 return;
2840
2841 if (WARN_ON(dev->ibi->enabled))
2842 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2843
2844 master->ops->free_ibi(dev);
2845 kfree(dev->ibi);
2846 dev->ibi = NULL;
2847 }
2848
i3c_init(void)2849 static int __init i3c_init(void)
2850 {
2851 int res;
2852
2853 res = of_alias_get_highest_id("i3c");
2854 if (res >= 0) {
2855 mutex_lock(&i3c_core_lock);
2856 __i3c_first_dynamic_bus_num = res + 1;
2857 mutex_unlock(&i3c_core_lock);
2858 }
2859
2860 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2861 if (res)
2862 return res;
2863
2864 res = bus_register(&i3c_bus_type);
2865 if (res)
2866 goto out_unreg_notifier;
2867
2868 return 0;
2869
2870 out_unreg_notifier:
2871 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2872
2873 return res;
2874 }
2875 subsys_initcall(i3c_init);
2876
i3c_exit(void)2877 static void __exit i3c_exit(void)
2878 {
2879 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2880 idr_destroy(&i3c_bus_idr);
2881 bus_unregister(&i3c_bus_type);
2882 }
2883 module_exit(i3c_exit);
2884
2885 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2886 MODULE_DESCRIPTION("I3C core");
2887 MODULE_LICENSE("GPL v2");
2888