Searched refs:MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 (Results 1 – 19 of 19) sorted by relevance
20 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
19 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE, input */
381 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
465 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
210 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
453 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
497 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
466 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
562 #define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1ec 0x500 0x000 0x5 0x0 macro
505 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98
688 #define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x208 0x5d8 0x000 0x5 0x0 macro
447 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099
504 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98
600 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
682 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */
671 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
746 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
697 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PWR_EN */
492 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0