Searched refs:MSR_IA32_MISC_ENABLE_TM1 (Results 1 – 4 of 4) sorted by relevance
747 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()808 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()
895 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << MSR_IA32_MISC_ENABLE_TM1_BIT) macro
901 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << MSR_IA32_MISC_ENABLE_TM1_BIT) macro
5346 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", in decode_misc_enable_msr()