Searched refs:MSR_F15H_PERF_CTR (Results 1 – 5 of 5) sorted by relevance
51 if (msr >= MSR_F15H_PERF_CTR) in nmi_perfctr_msr_to_bit()52 return (msr - MSR_F15H_PERF_CTR) >> 1; in nmi_perfctr_msr_to_bit()
665 #define MSR_F15H_PERF_CTR 0xc0010201 macro666 #define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR667 #define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)668 #define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)669 #define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)670 #define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)671 #define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
671 #define MSR_F15H_PERF_CTR 0xc0010201 macro672 #define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR673 #define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)674 #define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)675 #define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)676 #define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)677 #define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
77 amd_counters_base = MSR_F15H_PERF_CTR; in xen_pmu_arch_init()119 return MSR_F15H_PERF_CTR + (addr - MSR_K7_PERFCTR0); in get_fam15h_addr()139 msr < MSR_F15H_PERF_CTR + (amd_num_counters * 2)) || in is_amd_pmu_msr()
1355 x86_pmu.perfctr = MSR_F15H_PERF_CTR; in amd_core_pmu_init()