Home
last modified time | relevance | path

Searched refs:MP1_BASE__INST0_SEG5 (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_smu.c43 #define MP1_BASE__INST0_SEG5 0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h524 #define MP1_BASE__INST0_SEG5 0 macro
Ddimgrey_cavefish_ip_offset.h711 #define MP1_BASE__INST0_SEG5 0 macro
Dvega20_ip_offset.h551 #define MP1_BASE__INST0_SEG5 0 macro
Dbeige_goby_ip_offset.h838 #define MP1_BASE__INST0_SEG5 0 macro
Dvangogh_ip_offset.h961 #define MP1_BASE__INST0_SEG5 0 macro
Dyellow_carp_offset.h880 #define MP1_BASE__INST0_SEG5 0 macro
Darct_ip_offset.h699 #define MP1_BASE__INST0_SEG5 0x00F00000 macro
Daldebaran_ip_offset.h1008 #define MP1_BASE__INST0_SEG5 0 macro