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Searched refs:MLXSW_CORE_RES_VALID (Results 1 – 19 of 19) sorted by relevance

/linux-6.6.21/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_policer.c88 if (!MLXSW_CORE_RES_VALID(core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_single_rate_family_init()
89 !MLXSW_CORE_RES_VALID(core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_single_rate_family_init()
411 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_resources_register()
412 !MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_resources_register()
Dspectrum_cnt.c255 if (!MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_POOL_SIZE) || in mlxsw_sp_counter_resources_register()
256 !MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_BANK_SIZE)) in mlxsw_sp_counter_resources_register()
Dspectrum_acl_erp.c1499 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1500 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1501 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1502 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB)) in mlxsw_sp_acl_erp_tables_sizes_query()
1526 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANK_SIZE) || in mlxsw_sp_acl_erp_tables_init()
1527 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANKS)) in mlxsw_sp_acl_erp_tables_init()
Dspectrum_port_range.c166 if (!MLXSW_CORE_RES_VALID(core, ACL_MAX_L4_PORT_RANGE)) in mlxsw_sp_port_range_init()
Dspectrum2_acl_tcam.c85 if (MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_DEFAULT_ACTIONS)) in mlxsw_sp2_acl_tcam_init()
Dspectrum.c265 if (!MLXSW_CORE_RES_VALID(mlxsw_core, FID)) { in mlxsw_sp_txhdr_ptp_data_construct()
2560 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_cpu_policers_set()
2600 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS)) in mlxsw_sp_trap_groups_set()
2643 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS)) in mlxsw_sp_traps_init()
2723 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS)) in mlxsw_sp_lag_init()
3606 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp1_resources_kvd_register()
3666 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp2_resources_kvd_register()
3686 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN)) in mlxsw_sp_resources_span_register()
3706 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_RIF_MAC_PROFILES)) in mlxsw_sp_resources_rif_mac_profile_register()
3729 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_RIFS)) in mlxsw_sp_resources_rifs_register()
[all …]
Dspectrum_acl_bloom_filter.c492 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_BF_LOG)) in mlxsw_sp_acl_bf_init()
Dspectrum1_mr_tcam.c301 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_TCAM_RULES)) in mlxsw_sp1_mr_tcam_init()
Dspectrum_pgt.c325 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, PGT_SIZE)) in mlxsw_sp_pgt_init()
Dpci.c1602 if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V2) && in mlxsw_pci_init()
1605 else if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V1) && in mlxsw_pci_init()
1608 else if ((MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0) && in mlxsw_pci_init()
1610 !MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0)) { in mlxsw_pci_init()
Dspectrum_nve.c1106 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV4) || in mlxsw_sp_nve_resources_query()
1107 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV6)) in mlxsw_sp_nve_resources_query()
Dspectrum_buffers.c1254 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE)) in mlxsw_sp_buffers_init()
1257 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, GUARANTEED_SHARED_BUFFER)) in mlxsw_sp_buffers_init()
1260 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_HEADROOM_SIZE)) in mlxsw_sp_buffers_init()
Dspectrum_mr_tcam.c575 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MC_ERIF_LIST_ENTRIES)) in mlxsw_sp_mr_tcam_init()
Dcore.h452 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ macro
Dspectrum_acl_atcam.c125 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_LARGE_KEY_ID)) in mlxsw_sp_acl_atcam_region_12kb_init()
Dcore.c146 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) in mlxsw_ports_init()
199 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG)) in mlxsw_core_max_lag()
2213 if (!err && MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { in __mlxsw_core_bus_device_register()
Dspectrum_span.c86 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN)) in mlxsw_sp_span_init()
Dspectrum_acl_tcam.c44 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, KVD_SIZE)) in mlxsw_sp_acl_tcam_priority_get()
Dspectrum_router.c713 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LPM_TREES)) in mlxsw_sp_lpm_init()
1035 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_VRS)) in mlxsw_sp_vrs_init()
10847 if (!MLXSW_CORE_RES_VALID(core, MAX_RIF_MAC_PROFILES)) in mlxsw_sp_rifs_init()
11268 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_RIFS)) in __mlxsw_sp_router_init()