Searched refs:MDIO_WC_REG_XGXS_X2_CONTROL3 (Results 1 – 2 of 2) sorted by relevance
7400 #define MDIO_WC_REG_XGXS_X2_CONTROL3 0x8142 macro
3844 MDIO_WC_REG_XGXS_X2_CONTROL3, 0x7); in bnx2x_warpcore_enable_AN_KR()