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Searched refs:MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h4674 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c macro
Dgmc_8_2_sh_mask.h5588 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c macro
Dgmc_7_1_sh_mask.h5310 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c macro
Dgmc_8_1_sh_mask.h5748 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_9_1_sh_mask.h9290 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dmmhub_1_0_sh_mask.h9627 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dmmhub_9_3_0_sh_mask.h9717 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dmmhub_1_8_0_sh_mask.h22318 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dmmhub_1_7_sh_mask.h30123 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h22634 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dgc_9_1_sh_mask.h23925 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dgc_9_2_1_sh_mask.h23928 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dgc_9_4_3_sh_mask.h26111 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro
Dgc_9_4_2_sh_mask.h29641 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE__SHIFT macro