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Searched refs:MC_TRAIN_EDCCDR_R_D1__EDC2__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_sh_mask.h9643 #define MC_TRAIN_EDCCDR_R_D1__EDC2__SHIFT 0x00000010 macro
Dgmc_7_1_sh_mask.h7156 #define MC_TRAIN_EDCCDR_R_D1__EDC2__SHIFT 0x10 macro
Dgmc_8_1_sh_mask.h8070 #define MC_TRAIN_EDCCDR_R_D1__EDC2__SHIFT 0x10 macro