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Searched refs:MC_SEQ_RAS_TIMING_LP (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/radeon/
Dbtcd.h147 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
Dnid.h805 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
Dbtc_dpm.c1859 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in btc_check_s0_mc_reg_index()
2028 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in btc_initialize_mc_reg_table()
Dsid.h573 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
Dcikd.h698 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
Devergreend.h323 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
Dni_dpm.c2777 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in ni_check_s0_mc_reg_index()
2886 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c974 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
Dci_dpm.c4374 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in ci_check_s0_mc_reg_index()
4597 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
Dsi_dpm.c5412 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2; in si_check_s0_mc_reg_index()
5525 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dsid.h574 #define MC_SEQ_RAS_TIMING_LP 0xA9B macro
/linux-6.6.21/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5905 *out_reg = MC_SEQ_RAS_TIMING_LP; in si_check_s0_mc_reg_index()
6018 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()