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Searched refs:MC_SEQ_RAS_TIMING (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/radeon/
Dbtcd.h104 #define MC_SEQ_RAS_TIMING 0x28a0 macro
Dnid.h780 #define MC_SEQ_RAS_TIMING 0x28a0 macro
Dbtc_dpm.c1858 case MC_SEQ_RAS_TIMING >> 2: in btc_check_s0_mc_reg_index()
2028 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in btc_initialize_mc_reg_table()
Dsid.h541 #define MC_SEQ_RAS_TIMING 0x28a0 macro
Dcikd.h654 #define MC_SEQ_RAS_TIMING 0x28a0 macro
Devergreend.h286 #define MC_SEQ_RAS_TIMING 0x28a0 macro
Dni_dpm.c2776 case MC_SEQ_RAS_TIMING >> 2: in ni_check_s0_mc_reg_index()
2886 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c975 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RAS_TIMING >> 2; in cypress_set_mc_reg_address_table()
Dci_dpm.c4373 case MC_SEQ_RAS_TIMING >> 2: in ci_check_s0_mc_reg_index()
4597 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
Dsi_dpm.c5411 case MC_SEQ_RAS_TIMING >> 2: in si_check_s0_mc_reg_index()
5525 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dsid.h542 #define MC_SEQ_RAS_TIMING 0xA28 macro
/linux-6.6.21/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5904 case MC_SEQ_RAS_TIMING: in si_check_s0_mc_reg_index()
6018 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in si_initialize_mc_reg_table()