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Searched refs:MC_SEQ_PERF_SEQ_CTL__SEL_CH0_D__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_sh_mask.h8275 #define MC_SEQ_PERF_SEQ_CTL__SEL_CH0_D__SHIFT 0x0000000c macro
Dgmc_7_1_sh_mask.h8598 #define MC_SEQ_PERF_SEQ_CTL__SEL_CH0_D__SHIFT 0xc macro
Dgmc_8_1_sh_mask.h9512 #define MC_SEQ_PERF_SEQ_CTL__SEL_CH0_D__SHIFT 0xc macro