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Searched refs:MC_SEQ_G5PDX_CTRL__CH0_ENABLE_MASK (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_1_sh_mask.h13933 #define MC_SEQ_G5PDX_CTRL__CH0_ENABLE_MASK 0x1 macro
Dgmc_8_1_sh_mask.h14847 #define MC_SEQ_G5PDX_CTRL__CH0_ENABLE_MASK 0x1 macro