Searched refs:MAX_MSI_IRQS_PER_CTRL (Results 1 – 3 of 3) sorted by relevance
65 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dw_handle_msi_irq()76 while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, in dw_handle_msi_irq()77 pos)) != MAX_MSI_IRQS_PER_CTRL) { in dw_handle_msi_irq()79 (i * MAX_MSI_IRQS_PER_CTRL) + in dw_handle_msi_irq()134 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()136 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()153 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()155 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()169 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()171 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()[all …]
216 pos = find_first_bit(&val, MAX_MSI_IRQS_PER_CTRL); in dra7xx_pcie_handle_msi()217 while (pos != MAX_MSI_IRQS_PER_CTRL) { in dra7xx_pcie_handle_msi()219 (index * MAX_MSI_IRQS_PER_CTRL) + pos); in dra7xx_pcie_handle_msi()221 pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, pos); in dra7xx_pcie_handle_msi()232 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_handle_msi_irq()
235 #define MAX_MSI_IRQS_PER_CTRL 32 macro236 #define MAX_MSI_CTRLS (MAX_MSI_IRQS / MAX_MSI_IRQS_PER_CTRL)