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Searched refs:LANE_COUNT_DP_MAX (Results 1 – 23 of 23) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/link/protocols/
Dlink_dp_training.h83 union lane_status ln_status[LANE_COUNT_DP_MAX],
85 union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
112 const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
113 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
159 const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
160 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
Dlink_dp_training_fixed_vs_pe_retimer.c46 union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX]) in dp_fixed_vs_pe_read_lane_adjust() argument
65 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_fixed_vs_pe_read_lane_adjust()
74 const union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX], in dp_fixed_vs_pe_set_retimer_lane_settings() argument
168 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in perform_fixed_vs_pe_nontransparent_training_sequence()
318 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in dp_perform_fixed_vs_pe_training_sequence_legacy()
320 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dp_perform_fixed_vs_pe_training_sequence_legacy()
449 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_fixed_vs_pe_training_sequence_legacy()
450 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dp_perform_fixed_vs_pe_training_sequence_legacy()
664 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in dp_perform_fixed_vs_pe_training_sequence()
666 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dp_perform_fixed_vs_pe_training_sequence()
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Dlink_dp_training_fixed_vs_pe_retimer.h43 const union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX],
48 union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX]);
Dlink_dp_training_8b_10b.c164 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in perform_8b_10b_clock_recovery_sequence()
166 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in perform_8b_10b_clock_recovery_sequence()
281 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in perform_8b_10b_channel_equalization_sequence()
282 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in perform_8b_10b_channel_equalization_sequence()
399 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_perform_8b_10b_link_training()
Dlink_dp_training_128b_132b.c80 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_channel_eq_done_sequence()
81 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_channel_eq_done_sequence()
165 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_cds_done_sequence()
166 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_cds_done_sequence()
Dlink_dp_training.c303 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in maximize_lane_settings() argument
343 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in maximize_lane_settings()
352 const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX], in dp_hw_to_dpcd_lane_settings() argument
353 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]) in dp_hw_to_dpcd_lane_settings() argument
357 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_hw_to_dpcd_lane_settings()
558 union lane_status ln_status[LANE_COUNT_DP_MAX], in dp_get_lane_status_and_lane_adjust() argument
560 union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], in dp_get_lane_status_and_lane_adjust() argument
642 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in override_lane_settings() argument
653 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in override_lane_settings()
709 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in override_training_settings()
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Dlink_dp_training_dpia.c299 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent()
301 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent()
469 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent()
471 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent()
625 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_non_transparent()
626 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_non_transparent()
773 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_transparent()
774 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_transparent()
/linux-6.6.21/drivers/gpu/drm/amd/display/include/
Dlink_service_types.h113 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX];
114 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX];
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/link/hwss/
Dlink_hwss_dio.h53 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Dlink_hwss_hpo_dp.c149 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in set_hpo_dp_lane_settings() argument
Dlink_hwss_hpo_fixed_vs_pe_retimer_dp.c171 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in set_hpo_fixed_vs_pe_retimer_dp_lane_settings() argument
Dlink_hwss_dio.c162 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in set_dio_dp_lane_settings() argument
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/inc/
Dlink_hwss.h65 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_link_encoder.c65 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) {} in virtual_link_encoder_dp_set_lane_settings() argument
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/inc/hw/
Dlink_encoder.h133 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h283 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Ddce_link_encoder.c1323 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in dce110_link_encoder_dp_set_lane_settings() argument
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/link/accessories/
Dlink_dp_cts.c668 unsigned char link_qual_pattern[LANE_COUNT_DP_MAX] = {0}; in dp_set_test_pattern()
832 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) in dp_set_test_pattern()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.h591 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Ddcn10_link_encoder.c1101 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in dcn10_link_encoder_dp_set_lane_settings() argument
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/
Ddc_dp_types.h38 LANE_COUNT_DP_MAX = LANE_COUNT_FOUR enumerator
Ddc.h1485 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/link/
Dlink_dpms.c1134 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in poll_for_allocation_change_trigger()