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Searched refs:JH7110_SYSCLK_PLL0_DIV2 (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dstarfive,jh7110-crg.h30 #define JH7110_SYSCLK_PLL0_DIV2 13 macro
/linux-6.6.21/drivers/clk/starfive/
Dclk-starfive-jh7110-sys.c60 JH71X0__DIV(JH7110_SYSCLK_PLL0_DIV2, "pll0_div2", 2, JH7110_SYSCLK_PLL0_OUT),
73 JH71X0_GDIV(JH7110_SYSCLK_GCLK0, "gclk0", 0, 62, JH7110_SYSCLK_PLL0_DIV2),