Searched refs:INTC (Results 1 – 17 of 17) sorted by relevance
/linux-6.6.21/arch/mips/pci/ |
D | fixup-sni.c | 26 #define INTC PCIMT_IRQ_INTC macro 50 { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */ 51 { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */ 52 { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */ 64 { 0, INTC, INTD, INTA, INTB }, /* Slot 1 */ 67 { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */ 68 { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */ 69 { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */ 76 { 0, INTC, INTD, INTA, INTB }, /* Bridge/i960 */ 77 { 0, INTD, INTA, INTB, INTC }, /* Slot 1 */ [all …]
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D | fixup-ip32.c | 23 #define INTC MACEPCI_SHARED1_IRQ macro 30 {0, INTA0, INTB, INTC, INTD}, 31 {0, INTA1, INTC, INTD, INTB}, 32 {0, INTA2, INTD, INTB, INTC},
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/linux-6.6.21/arch/arc/boot/dts/ |
D | axc001.dtsi | 83 * This INTC is actually connected to DW APB GPIO 84 * which acts as a wire between MB INTC and CPU INTC. 85 * GPIO INTC is configured in platform init code 86 * and here we mimic direct connection from MB INTC to 87 * CPU INTC, thus we set "interrupts = <7>" instead of
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D | axc003_idu.dtsi | 127 * This INTC is actually connected to DW APB GPIO 128 * which acts as a wire between MB INTC and CPU INTC. 129 * GPIO INTC is configured in platform init code 130 * and here we mimic direct connection from MB INTC to 131 * CPU INTC, thus we set "interrupts = <0 1>" instead of
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/linux-6.6.21/Documentation/sound/hd-audio/ |
D | intel-multi-link.rst | 116 | INTC | 207 | INTC | 277 | INTC |
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/linux-6.6.21/Documentation/PCI/endpoint/function/binding/ |
D | pci-test.rst | 21 interrupt_pin Should be 1 - INTA, 2 - INTB, 3 - INTC, 4 -INTD
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/linux-6.6.21/Documentation/arch/x86/i386/ |
D | IO-APIC.rst | 65 Every PCI card emits a PCI IRQ, which can be INTA, INTB, INTC or INTD:: 70 INTC--|l|
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/linux-6.6.21/Documentation/devicetree/bindings/interrupt-controller/ |
D | ti,pruss-intc.yaml | 24 defined, it implies that all the PRUSS INTC output interrupts 2 through 9 88 Bitmask of host interrupts between 0 and 7 (corresponding to PRUSS INTC
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D | renesas,intc-irqpin.yaml | 7 title: Renesas Interrupt Controller (INTC) for external pins
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/linux-6.6.21/drivers/pci/controller/dwc/ |
D | pci-dra7xx.c | 60 #define INTC BIT(2) macro 63 #define LEG_EP_INTERRUPTS (INTA | INTB | INTC | INTD) 278 case INTC: in dra7xx_pcie_msi_irq_handler()
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/linux-6.6.21/Documentation/devicetree/bindings/soc/ti/ |
D | ti,pruss.yaml | 38 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are 51 processor cores, the memories node, an INTC node and an MDIO node represented 283 PRUSS INTC Node. Each PRUSS has a single interrupt controller instance
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/linux-6.6.21/arch/powerpc/boot/dts/ |
D | holly.dts | 157 | The INTA, INTB, INTC, INTD are shared.
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D | katmai.dts | 309 * INTC: J2: 1-2
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/linux-6.6.21/drivers/irqchip/ |
D | Kconfig | 222 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 535 The PRUSS INTC enables various interrupts to be routed to multiple
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/linux-6.6.21/arch/arm64/boot/dts/socionext/ |
D | uniphier-ld20.dtsi | 939 <0 0 0 3 &pcie_intc 2>, /* INTC */
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D | uniphier-pxs3.dtsi | 915 <0 0 0 3 &pcie_intc 2>, /* INTC */
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/linux-6.6.21/drivers/pinctrl/renesas/ |
D | pfc-sh7785.c | 932 GPIO_FN(INTC),
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