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Searched refs:IMX8ULP_CLK_SPLL3_PFD0_DIV1_GATE (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dimx8ulp-clock.h44 #define IMX8ULP_CLK_SPLL3_PFD0_DIV1_GATE 37 macro
/linux-6.6.21/drivers/clk/imx/
Dclk-imx8ulp.c179 …clks[IMX8ULP_CLK_SPLL3_PFD0_DIV1_GATE] = imx_clk_hw_gate_dis("spll3_pfd0_div1_gate", "spll3_pfd0",… in imx8ulp_clk_cgc1_init()