Searched refs:IMX6UL_CLK_PLL5 (Results 1 – 2 of 2) sorted by relevance
24 #define IMX6UL_CLK_PLL5 15 macro
167 hws[IMX6UL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f); in imx6ul_clocks_init()184 clk_set_parent(hws[IMX6UL_PLL5_BYPASS]->clk, hws[IMX6UL_CLK_PLL5]->clk); in imx6ul_clocks_init()