Searched refs:IMX6SX_CLK_SSI1_SEL (Results 1 – 2 of 2) sorted by relevance
59 #define IMX6SX_CLK_SSI1_SEL 50 macro
282 …hws[IMX6SX_CLK_SSI1_SEL] = imx_clk_hw_mux("ssi1_sel", base + 0x1c, 10, 2, … in imx6sx_clocks_init()528 clk_set_parent(hws[IMX6SX_CLK_SSI1_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk); in imx6sx_clocks_init()