Searched refs:IMX5_CLK_USB_PHY1_GATE (Results 1 – 4 of 4) sorted by relevance
132 #define IMX5_CLK_USB_PHY1_GATE 124 macro
322 clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); in mx50_clocks_init()533 clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); in mx53_clocks_init()
91 clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
121 clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;