Searched refs:HEVC_ENC_CMD_REG_WAIT (Results 1 – 2 of 2) sorted by relevance
432 #define HEVC_ENC_CMD_REG_WAIT 0x0000010a macro
1436 amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT); in uvd_v7_0_enc_ring_emit_reg_wait()