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Searched refs:HCLK_I2S0 (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Drk3188-cru-common.h114 #define HCLK_I2S0 454 macro
Dpx30-cru.h138 #define HCLK_I2S0 262 macro
Drk3288-cru.h180 #define HCLK_I2S0 462 macro
Drockchip,rv1126-cru.h269 #define HCLK_I2S0 205 macro
/linux-6.6.21/Documentation/devicetree/bindings/sound/
Drockchip-i2s.yaml133 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
/linux-6.6.21/drivers/clk/rockchip/
Dclk-rk3188.c638 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 4, GFLAGS),
733 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS),
Dclk-rk3288.c677 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK3288_CLKGATE_CON(10), 8, GFLAGS),
Dclk-px30.c840 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_bus_pre", 0, PX30_CLKGATE_CON(14), 2, GFLAGS),
Dclk-rv1126.c633 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_pdaudio", 0,
/linux-6.6.21/arch/arm/boot/dts/rockchip/
Drk3288-firefly-reload.dts222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
Drk3188.dtsi171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
Drk3066a.dtsi160 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
Drk3288.dtsi965 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
/linux-6.6.21/arch/arm64/boot/dts/rockchip/
Dpx30.dtsi393 clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>;