Searched refs:HAL_SEQ_WCSS_UMAC_WBM_REG (Results 1 – 5 of 5) sorted by relevance
878 HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_R0_IDLE_LIST_CONTROL_ADDR, in ath11k_hal_setup_link_idle_list()882 HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_R0_IDLE_LIST_SIZE_ADDR, in ath11k_hal_setup_link_idle_list()886 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()891 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()902 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()907 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()916 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()922 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()927 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()935 HAL_SEQ_WCSS_UMAC_WBM_REG + in ath11k_hal_setup_link_idle_list()[all …]
54 #define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000 macro
594 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()595 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP; in ath12k_hal_srng_create_config_qcn9274()598 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + in ath12k_hal_srng_create_config_qcn9274()600 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_SW_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()606 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()607 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()622 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + in ath12k_hal_srng_create_config_qcn9274()624 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_PPE_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()1037 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()1038 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP; in ath12k_hal_srng_create_config_wcn7850()[all …]
51 #define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000 macro
1255 u32 wbm_base = HAL_SEQ_WCSS_UMAC_WBM_REG; in ath12k_dp_cc_config()