Searched refs:GET_HW_DATA (Results 1 – 7 of 7) sorted by relevance
259 #define GET_HW_DATA(accel_dev) (accel_dev->hw_device) macro260 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)262 GET_HW_DATA(accel_dev)->num_rings_per_bank264 (((GET_HW_DATA(accel_dev)->ring_to_svc_map) >> (ADF_SRV_TYPE_BIT_LEN * (idx))) \266 #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
51 struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); in adf_fw_counters_load_from_device()108 struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); in adf_fw_counters_get()
120 u16 ring_to_svc_map = GET_HW_DATA(accel_dev)->ring_to_svc_map; in qat_crypto_vf_dev_config()128 return GET_HW_DATA(accel_dev)->dev_config(accel_dev); in qat_crypto_vf_dev_config()
482 if (config && GET_HW_DATA(accel_dev)->dev_config) { in adf_dev_up()483 ret = GET_HW_DATA(accel_dev)->dev_config(accel_dev); in adf_dev_up()
140 hw_data = GET_HW_DATA(accel_dev); in cfg_services_store()
218 u32 ae_mask = GET_HW_DATA(accel_dev)->ae_mask; in adf_set_chaining()
44 (GET_HW_DATA(accel_dev)->accel_capabilities_mask & \