Searched refs:G1_SWREG (Results 1 – 2 of 2) sorted by relevance
12 #define G1_SWREG(nr) ((nr) * 4) macro306 #define G1_REG_PP_INTERRUPT G1_SWREG(60)312 #define G1_REG_PP_DEV_CONFIG G1_SWREG(61)322 #define G1_REG_PP_IN_LUMA_BASE G1_SWREG(63)323 #define G1_REG_PP_IN_CB_BASE G1_SWREG(64)324 #define G1_REG_PP_IN_CR_BASE G1_SWREG(65)325 #define G1_REG_PP_OUT_LUMA_BASE G1_SWREG(66)326 #define G1_REG_PP_OUT_CHROMA_BASE G1_SWREG(67)327 #define G1_REG_PP_CONTRAST_ADJUST G1_SWREG(68)328 #define G1_REG_PP_COLOR_CONVERSION G1_SWREG(69)[all …]
15 #define G1_SWREG(nr) ((nr) * 4) macro17 #define G1_REG_RLC_VLC_BASE G1_SWREG(12)18 #define G1_REG_DEC_OUT_BASE G1_SWREG(13)19 #define G1_REG_REFER0_BASE G1_SWREG(14)20 #define G1_REG_REFER1_BASE G1_SWREG(15)21 #define G1_REG_REFER2_BASE G1_SWREG(16)22 #define G1_REG_REFER3_BASE G1_SWREG(17)23 #define G1_REG_QTABLE_BASE G1_SWREG(40)181 vdpu_write_relaxed(vpu, reg, G1_SWREG(2)); in hantro_g1_mpeg2_dec_run()194 vdpu_write_relaxed(vpu, reg, G1_SWREG(3)); in hantro_g1_mpeg2_dec_run()[all …]