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Searched refs:G1_REG_PP_INTERRUPT (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/media/platform/verisilicon/
Dhantro_postproc.c39 .pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1},
Dhantro_g1_regs.h306 #define G1_REG_PP_INTERRUPT G1_SWREG(60) macro