Searched refs:EXYNOS5_ARM_L2_SYS_PWR_REG (Results 1 – 3 of 3) sorted by relevance
27 { EXYNOS5_ARM_L2_SYS_PWR_REG, { 0x3, 0x3, 0x3} },
47 { EXYNOS5_ARM_L2_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
372 #define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0 macro