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Searched refs:Delay (Results 1 – 25 of 101) sorted by relevance

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/linux-6.6.21/Documentation/devicetree/bindings/mmc/
Dsdhci-sprd.txt33 - sprd,phy-delay-legacy: Delay value for legacy timing.
34 - sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
37 - sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.
38 - sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
39 - sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
/linux-6.6.21/Documentation/devicetree/bindings/spi/
Dcdns,qspi-nor-peripheral-props.yaml20 Delay for read capture logic, in clock cycles.
24 Delay in nanoseconds for the length that the master mode chip select
29 Delay in nanoseconds between one chip select being de-activated
34 Delay in nanoseconds between last bit of current transaction and
39 Delay in nanoseconds between setting qspi_n_ss_out low and
Dspi-peripheral-props.yaml49 Delay in nanoseconds to be introduced by the controller after CS is
54 Delay in nanoseconds to be introduced by the controller before CS is
59 Delay in nanoseconds to be introduced by the controller after CS is
72 Delay, in microseconds, after a read transfer.
89 Delay, in microseconds, after a write transfer.
/linux-6.6.21/Documentation/accounting/
Dtaskstats-struct.rst13 2) Delay accounting fields
16 /* Delay accounting fields start */
20 /* Delay accounting fields end */
97 2) Delay accounting fields::
99 /* Delay accounting fields start
101 * All values, until the comment "Delay accounting fields end" are
112 /* Delay waiting for cpu, while runnable
120 /* Delay waiting for synchronous block I/O to complete
126 /* Delay waiting for page fault I/O (swap in only) */
145 /* Delay accounting fields end */
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/linux-6.6.21/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt67 - mpmc,write-enable-delay: Delay from chip select assertion to write
70 - mpmc,output-enable-delay: Delay from chip select assertion to output
73 - mpmc,write-access-delay: Delay from chip select assertion to write
76 - mpmc,read-access-delay: Delay from chip select assertion to read
79 - mpmc,page-mode-read-delay: Delay for asynchronous page mode sequential
82 - mpmc,turn-round-delay: Delay between access to memory banks in nano
/linux-6.6.21/arch/sparc/kernel/
Ditlb_miss.S8 srlx %g6, 22, %g6 ! Delay slot
18 nop ! Delay slot, fill me
/linux-6.6.21/Documentation/devicetree/bindings/sound/
Ddmic-codec.yaml34 description: Delay (in ms) to complete DMIC mode switch
37 description: Delay (in ms) after enabling the DMIC
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_util_32.c54 Delay, pixels; in dml32_dscceComputeDelay() local
96 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dml32_dscceComputeDelay()
99 pixels = Delay * 3 * pixelsPerClock; in dml32_dscceComputeDelay()
116 unsigned int Delay = 0; in dml32_dscComputeDelay() local
120 Delay = Delay + 2; in dml32_dscComputeDelay()
122 Delay = Delay + 0; in dml32_dscComputeDelay()
124 Delay = Delay + 3; in dml32_dscComputeDelay()
126 Delay = Delay + 2; in dml32_dscComputeDelay()
128 Delay = Delay + 12; in dml32_dscComputeDelay()
130 Delay = Delay + 13; in dml32_dscComputeDelay()
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/linux-6.6.21/tools/power/pm-graph/config/
Dfreeze.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dstandby.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dstandby-callgraph.cfg58 # Back to Back Suspend Delay
62 # Pre Suspend Delay
66 # Post Resume Delay
Dstandby-dev.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dsuspend-dev.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dfreeze-callgraph.cfg58 # Back to Back Suspend Delay
62 # Pre Suspend Delay
66 # Post Resume Delay
Dfreeze-dev.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dsuspend-callgraph.cfg58 # Back to Back Suspend Delay
62 # Pre Suspend Delay
66 # Post Resume Delay
Dsuspend-x2-proc.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
Dsuspend.cfg57 # Back to Back Suspend Delay
61 # Pre Suspend Delay
65 # Post Resume Delay
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c320 Delay, pixels; in dscceComputeDelay() local
360 Delay = l * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
363 pixels = Delay * 3 * pixelsPerClock; in dscceComputeDelay()
369 unsigned int Delay = 0; in dscComputeDelay() local
373 Delay = Delay + 2; in dscComputeDelay()
375 Delay = Delay + 0; in dscComputeDelay()
377 Delay = Delay + 3; in dscComputeDelay()
379 Delay = Delay + 2; in dscComputeDelay()
381 Delay = Delay + 12; in dscComputeDelay()
383 Delay = Delay + 13; in dscComputeDelay()
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Ddisplay_mode_vba_20v2.c344 Delay, pixels; in dscceComputeDelay() local
384 Delay = l * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
387 pixels = Delay * 3 * pixelsPerClock; in dscceComputeDelay()
393 unsigned int Delay = 0; in dscComputeDelay() local
397 Delay = Delay + 2; in dscComputeDelay()
399 Delay = Delay + 0; in dscComputeDelay()
401 Delay = Delay + 3; in dscComputeDelay()
403 Delay = Delay + 2; in dscComputeDelay()
405 Delay = Delay + 12; in dscComputeDelay()
407 Delay = Delay + 13; in dscComputeDelay()
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/linux-6.6.21/Documentation/devicetree/bindings/power/reset/
Dgpio-restart.yaml51 description: Delay (default 100) to wait after driving gpio active [ms]
56 description: Delay (default 100) to wait after driving gpio inactive [ms]
61 description: Delay (default 3000) to wait after completing restart sequence [ms]
Dgpio-poweroff.yaml37 description: Delay to wait after driving gpio active
41 description: Delay to wait after driving gpio inactive
/linux-6.6.21/Documentation/devicetree/bindings/net/
Dmdio.yaml44 Delay after reset deassert in microseconds. It applies to all MDIO
86 Delay after the reset was asserted in microseconds. If this
91 Delay after the reset was deasserted in microseconds. If
/linux-6.6.21/Documentation/devicetree/bindings/mtd/
Dlpc32xx-slc.txt11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c515 Delay, pixels; in dscceComputeDelay() local
555 Delay = l * wx * (numSlices - 1) + ax + S + lstall + 22; in dscceComputeDelay()
558 pixels = Delay * 3 * pixelsPerClock; in dscceComputeDelay()
564 unsigned int Delay = 0; in dscComputeDelay() local
568 Delay = Delay + 2; in dscComputeDelay()
570 Delay = Delay + 0; in dscComputeDelay()
572 Delay = Delay + 3; in dscComputeDelay()
574 Delay = Delay + 2; in dscComputeDelay()
576 Delay = Delay + 12; in dscComputeDelay()
578 Delay = Delay + 13; in dscComputeDelay()
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