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Searched refs:DUMPREG (Results 1 – 15 of 15) sorted by relevance

/linux-6.6.21/drivers/media/platform/ti/vpe/
Dsc.c25 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs() macro
30 DUMPREG(SC0); in sc_dump_regs()
31 DUMPREG(SC1); in sc_dump_regs()
32 DUMPREG(SC2); in sc_dump_regs()
33 DUMPREG(SC3); in sc_dump_regs()
34 DUMPREG(SC4); in sc_dump_regs()
35 DUMPREG(SC5); in sc_dump_regs()
36 DUMPREG(SC6); in sc_dump_regs()
37 DUMPREG(SC8); in sc_dump_regs()
38 DUMPREG(SC9); in sc_dump_regs()
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Dvpdma.c311 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, read_reg(vpdma, VPDMA_##r)) in vpdma_dump_regs() macro
315 DUMPREG(PID); in vpdma_dump_regs()
316 DUMPREG(LIST_ADDR); in vpdma_dump_regs()
317 DUMPREG(LIST_ATTR); in vpdma_dump_regs()
318 DUMPREG(LIST_STAT_SYNC); in vpdma_dump_regs()
319 DUMPREG(BG_RGB); in vpdma_dump_regs()
320 DUMPREG(BG_YUV); in vpdma_dump_regs()
321 DUMPREG(SETUP); in vpdma_dump_regs()
322 DUMPREG(MAX_SIZE1); in vpdma_dump_regs()
323 DUMPREG(MAX_SIZE2); in vpdma_dump_regs()
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Dcsc.c114 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in csc_dump_regs() macro
119 DUMPREG(CSC00); in csc_dump_regs()
120 DUMPREG(CSC01); in csc_dump_regs()
121 DUMPREG(CSC02); in csc_dump_regs()
122 DUMPREG(CSC03); in csc_dump_regs()
123 DUMPREG(CSC04); in csc_dump_regs()
124 DUMPREG(CSC05); in csc_dump_regs()
126 #undef DUMPREG in csc_dump_regs()
Dvpe.c955 #define DUMPREG(r) vpe_dbg(dev, "%-35s %08x\n", #r, read_reg(dev, VPE_##r)) in vpe_dump_regs() macro
959 DUMPREG(PID); in vpe_dump_regs()
960 DUMPREG(SYSCONFIG); in vpe_dump_regs()
961 DUMPREG(INT0_STATUS0_RAW); in vpe_dump_regs()
962 DUMPREG(INT0_STATUS0); in vpe_dump_regs()
963 DUMPREG(INT0_ENABLE0); in vpe_dump_regs()
964 DUMPREG(INT0_STATUS1_RAW); in vpe_dump_regs()
965 DUMPREG(INT0_STATUS1); in vpe_dump_regs()
966 DUMPREG(INT0_ENABLE1); in vpe_dump_regs()
967 DUMPREG(CLK_ENABLE); in vpe_dump_regs()
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/linux-6.6.21/drivers/video/fbdev/omap2/omapfb/dss/
Dvenc.c606 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, venc_read_reg(r)) in venc_dump_regs() macro
611 DUMPREG(VENC_F_CONTROL); in venc_dump_regs()
612 DUMPREG(VENC_VIDOUT_CTRL); in venc_dump_regs()
613 DUMPREG(VENC_SYNC_CTRL); in venc_dump_regs()
614 DUMPREG(VENC_LLEN); in venc_dump_regs()
615 DUMPREG(VENC_FLENS); in venc_dump_regs()
616 DUMPREG(VENC_HFLTR_CTRL); in venc_dump_regs()
617 DUMPREG(VENC_CC_CARR_WSS_CARR); in venc_dump_regs()
618 DUMPREG(VENC_C_PHASE); in venc_dump_regs()
619 DUMPREG(VENC_GAIN_U); in venc_dump_regs()
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Dhdmi_wp.c23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump() macro
25 DUMPREG(HDMI_WP_REVISION); in hdmi_wp_dump()
26 DUMPREG(HDMI_WP_SYSCONFIG); in hdmi_wp_dump()
27 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_dump()
28 DUMPREG(HDMI_WP_IRQSTATUS); in hdmi_wp_dump()
29 DUMPREG(HDMI_WP_IRQENABLE_SET); in hdmi_wp_dump()
30 DUMPREG(HDMI_WP_IRQENABLE_CLR); in hdmi_wp_dump()
31 DUMPREG(HDMI_WP_IRQWAKEEN); in hdmi_wp_dump()
32 DUMPREG(HDMI_WP_PWR_CTRL); in hdmi_wp_dump()
33 DUMPREG(HDMI_WP_DEBOUNCE); in hdmi_wp_dump()
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Ddispc.c3398 #define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r)) in dispc_dump_regs() macro
3404 DUMPREG(DISPC_REVISION); in dispc_dump_regs()
3405 DUMPREG(DISPC_SYSCONFIG); in dispc_dump_regs()
3406 DUMPREG(DISPC_SYSSTATUS); in dispc_dump_regs()
3407 DUMPREG(DISPC_IRQSTATUS); in dispc_dump_regs()
3408 DUMPREG(DISPC_IRQENABLE); in dispc_dump_regs()
3409 DUMPREG(DISPC_CONTROL); in dispc_dump_regs()
3410 DUMPREG(DISPC_CONFIG); in dispc_dump_regs()
3411 DUMPREG(DISPC_CAPABLE); in dispc_dump_regs()
3412 DUMPREG(DISPC_LINE_STATUS); in dispc_dump_regs()
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Ddsi.c1649 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs() macro
1655 DUMPREG(DSI_REVISION); in dsi_dump_dsidev_regs()
1656 DUMPREG(DSI_SYSCONFIG); in dsi_dump_dsidev_regs()
1657 DUMPREG(DSI_SYSSTATUS); in dsi_dump_dsidev_regs()
1658 DUMPREG(DSI_IRQSTATUS); in dsi_dump_dsidev_regs()
1659 DUMPREG(DSI_IRQENABLE); in dsi_dump_dsidev_regs()
1660 DUMPREG(DSI_CTRL); in dsi_dump_dsidev_regs()
1661 DUMPREG(DSI_COMPLEXIO_CFG1); in dsi_dump_dsidev_regs()
1662 DUMPREG(DSI_COMPLEXIO_IRQ_STATUS); in dsi_dump_dsidev_regs()
1663 DUMPREG(DSI_COMPLEXIO_IRQ_ENABLE); in dsi_dump_dsidev_regs()
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Ddss.c374 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) in dss_dump_regs() macro
379 DUMPREG(DSS_REVISION); in dss_dump_regs()
380 DUMPREG(DSS_SYSCONFIG); in dss_dump_regs()
381 DUMPREG(DSS_SYSSTATUS); in dss_dump_regs()
382 DUMPREG(DSS_CONTROL); in dss_dump_regs()
386 DUMPREG(DSS_SDI_CONTROL); in dss_dump_regs()
387 DUMPREG(DSS_PLL_CONTROL); in dss_dump_regs()
388 DUMPREG(DSS_SDI_STATUS); in dss_dump_regs()
392 #undef DUMPREG in dss_dump_regs()
/linux-6.6.21/drivers/gpu/drm/omapdrm/dss/
Dvenc.c463 #define DUMPREG(venc, r) \ in venc_dump_regs() macro
469 DUMPREG(venc, VENC_F_CONTROL); in venc_dump_regs()
470 DUMPREG(venc, VENC_VIDOUT_CTRL); in venc_dump_regs()
471 DUMPREG(venc, VENC_SYNC_CTRL); in venc_dump_regs()
472 DUMPREG(venc, VENC_LLEN); in venc_dump_regs()
473 DUMPREG(venc, VENC_FLENS); in venc_dump_regs()
474 DUMPREG(venc, VENC_HFLTR_CTRL); in venc_dump_regs()
475 DUMPREG(venc, VENC_CC_CARR_WSS_CARR); in venc_dump_regs()
476 DUMPREG(venc, VENC_C_PHASE); in venc_dump_regs()
477 DUMPREG(venc, VENC_GAIN_U); in venc_dump_regs()
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Dhdmi_wp.c22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump() macro
24 DUMPREG(HDMI_WP_REVISION); in hdmi_wp_dump()
25 DUMPREG(HDMI_WP_SYSCONFIG); in hdmi_wp_dump()
26 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_dump()
27 DUMPREG(HDMI_WP_IRQSTATUS); in hdmi_wp_dump()
28 DUMPREG(HDMI_WP_IRQENABLE_SET); in hdmi_wp_dump()
29 DUMPREG(HDMI_WP_IRQENABLE_CLR); in hdmi_wp_dump()
30 DUMPREG(HDMI_WP_IRQWAKEEN); in hdmi_wp_dump()
31 DUMPREG(HDMI_WP_PWR_CTRL); in hdmi_wp_dump()
32 DUMPREG(HDMI_WP_DEBOUNCE); in hdmi_wp_dump()
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Ddispc.c3478 #define DUMPREG(dispc, r) \ in dispc_dump_regs() macro
3485 DUMPREG(dispc, DISPC_REVISION); in dispc_dump_regs()
3486 DUMPREG(dispc, DISPC_SYSCONFIG); in dispc_dump_regs()
3487 DUMPREG(dispc, DISPC_SYSSTATUS); in dispc_dump_regs()
3488 DUMPREG(dispc, DISPC_IRQSTATUS); in dispc_dump_regs()
3489 DUMPREG(dispc, DISPC_IRQENABLE); in dispc_dump_regs()
3490 DUMPREG(dispc, DISPC_CONTROL); in dispc_dump_regs()
3491 DUMPREG(dispc, DISPC_CONFIG); in dispc_dump_regs()
3492 DUMPREG(dispc, DISPC_CAPABLE); in dispc_dump_regs()
3493 DUMPREG(dispc, DISPC_LINE_STATUS); in dispc_dump_regs()
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Ddsi.c1143 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsi, r)) in dsi_dump_dsi_regs() macro
1144 DUMPREG(DSI_REVISION); in dsi_dump_dsi_regs()
1145 DUMPREG(DSI_SYSCONFIG); in dsi_dump_dsi_regs()
1146 DUMPREG(DSI_SYSSTATUS); in dsi_dump_dsi_regs()
1147 DUMPREG(DSI_IRQSTATUS); in dsi_dump_dsi_regs()
1148 DUMPREG(DSI_IRQENABLE); in dsi_dump_dsi_regs()
1149 DUMPREG(DSI_CTRL); in dsi_dump_dsi_regs()
1150 DUMPREG(DSI_COMPLEXIO_CFG1); in dsi_dump_dsi_regs()
1151 DUMPREG(DSI_COMPLEXIO_IRQ_STATUS); in dsi_dump_dsi_regs()
1152 DUMPREG(DSI_COMPLEXIO_IRQ_ENABLE); in dsi_dump_dsi_regs()
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Ddss.c359 #define DUMPREG(dss, r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(dss, r)) in dss_dump_regs() macro
364 DUMPREG(dss, DSS_REVISION); in dss_dump_regs()
365 DUMPREG(dss, DSS_SYSCONFIG); in dss_dump_regs()
366 DUMPREG(dss, DSS_SYSSTATUS); in dss_dump_regs()
367 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
370 DUMPREG(dss, DSS_SDI_CONTROL); in dss_dump_regs()
371 DUMPREG(dss, DSS_PLL_CONTROL); in dss_dump_regs()
372 DUMPREG(dss, DSS_SDI_STATUS); in dss_dump_regs()
376 #undef DUMPREG in dss_dump_regs()
/linux-6.6.21/drivers/gpu/drm/exynos/
Dexynos_mixer.c226 #define DUMPREG(reg_id) \ in mixer_regs_dump() macro
232 DUMPREG(MXR_STATUS); in mixer_regs_dump()
233 DUMPREG(MXR_CFG); in mixer_regs_dump()
234 DUMPREG(MXR_INT_EN); in mixer_regs_dump()
235 DUMPREG(MXR_INT_STATUS); in mixer_regs_dump()
237 DUMPREG(MXR_LAYER_CFG); in mixer_regs_dump()
238 DUMPREG(MXR_VIDEO_CFG); in mixer_regs_dump()
240 DUMPREG(MXR_GRAPHIC0_CFG); in mixer_regs_dump()
241 DUMPREG(MXR_GRAPHIC0_BASE); in mixer_regs_dump()
242 DUMPREG(MXR_GRAPHIC0_SPAN); in mixer_regs_dump()
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