Searched refs:DMA_RB_WPTR (Results 1 – 9 of 9) sorted by relevance
85 reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET; in cayman_dma_get_wptr()87 reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET; in cayman_dma_get_wptr()106 reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET; in cayman_dma_set_wptr()108 reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET; in cayman_dma_set_wptr()218 WREG32(DMA_RB_WPTR + reg_offset, 0); in cayman_dma_resume()243 WREG32(DMA_RB_WPTR + reg_offset, ring->wptr << 2); in cayman_dma_resume()
74 return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2; in r600_dma_get_wptr()88 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()139 WREG32(DMA_RB_WPTR, 0); in r600_dma_resume()167 WREG32(DMA_RB_WPTR, ring->wptr << 2); in r600_dma_resume()
660 #define DMA_RB_WPTR 0xd00c macro
1313 #define DMA_RB_WPTR 0xd00c macro
1824 #define DMA_RB_WPTR 0xd00c macro
1402 #define DMA_RB_WPTR 0xd00c macro
622 #define DMA_RB_WPTR 0xd00c macro
51 return (RREG32(DMA_RB_WPTR + sdma_offsets[me]) & 0x3fffc) >> 2; in si_dma_ring_get_wptr()59 WREG32(DMA_RB_WPTR + sdma_offsets[me], (ring->wptr << 2) & 0x3fffc); in si_dma_ring_set_wptr()151 WREG32(DMA_RB_WPTR + sdma_offsets[i], 0); in si_dma_start()174 WREG32(DMA_RB_WPTR + sdma_offsets[i], ring->wptr << 2); in si_dma_start()
1887 #define DMA_RB_WPTR 0x3403 macro