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Searched refs:DISP_CC_PLL0 (Results 1 – 25 of 26) sorted by relevance

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/linux-6.6.21/include/dt-bindings/clock/
Dqcom,dispcc-qcm2290.h10 #define DISP_CC_PLL0 0 macro
Dqcom,sm6115-dispcc.h10 #define DISP_CC_PLL0 0 macro
Dqcom,sm6375-dispcc.h11 #define DISP_CC_PLL0 0 macro
Dqcom,dispcc-sm6125.h9 #define DISP_CC_PLL0 0 macro
Dqcom,dispcc-sc7180.h9 #define DISP_CC_PLL0 0 macro
Dqcom,dispcc-sm6350.h11 #define DISP_CC_PLL0 0 macro
Dqcom,dispcc-sdm845.h35 #define DISP_CC_PLL0 25 macro
Dqcom,dispcc-sc7280.h10 #define DISP_CC_PLL0 0 macro
Dqcom,dispcc-sm8250.h56 #define DISP_CC_PLL0 46 macro
Dqcom,dispcc-sm8350.h56 #define DISP_CC_PLL0 46 macro
Dqcom,dispcc-sm8150.h56 #define DISP_CC_PLL0 46 macro
Dqcom,dispcc-sc8280xp.h10 #define DISP_CC_PLL0 0 macro
Dqcom,sm8450-dispcc.h87 #define DISP_CC_PLL0 77 macro
Dqcom,sm8550-dispcc.h85 #define DISP_CC_PLL0 75 macro
/linux-6.6.21/drivers/clk/qcom/
Ddispcc-qcm2290.c482 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sm6115.c529 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sm6375.c538 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sc7180.c673 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sm6125.c645 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sm6350.c732 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sdm845.c812 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sc7280.c841 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sc8280xp.c2956 [DISP_CC_PLL0] = &disp0_cc_pll0.clkr,
3038 [DISP_CC_PLL0] = &disp1_cc_pll0.clkr,
3171 …clk_lucid_pll_configure(clkr_to_alpha_clk_pll(desc->clks[DISP_CC_PLL0]), regmap, &disp_cc_pll0_con… in disp_cc_sc8280xp_probe()
Ddispcc-sm8250.c1214 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,
Ddispcc-sm8450.c1723 [DISP_CC_PLL0] = &disp_cc_pll0.clkr,

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