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Searched refs:DISP_CC_MDSS_PCLK1_CLK_SRC (Results 1 – 23 of 23) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Dqcom,dispcc-sdm845.h28 #define DISP_CC_MDSS_PCLK1_CLK_SRC 18 macro
Dqcom,dispcc-sm8250.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
Dqcom,dispcc-sm8350.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
Dqcom,dispcc-sm8150.h49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
Dqcom,dispcc-sc8280xp.h78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
Dqcom,sm8450-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
Dqcom,sm8550-dispcc.h79 #define DISP_CC_MDSS_PCLK1_CLK_SRC 69 macro
/linux-6.6.21/Documentation/devicetree/bindings/display/msm/
Dqcom,sdm845-mdss.yaml231 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dqcom,sm8150-mdss.yaml283 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dqcom,sm8250-mdss.yaml285 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dqcom,sm8550-mdss.yaml293 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dqcom,sm8450-mdss.yaml304 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
/linux-6.6.21/drivers/clk/qcom/
Ddispcc-sdm845.c805 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
Ddispcc-sm8250.c1207 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
Ddispcc-sc8280xp.c2947 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp0_cc_mdss_pclk1_clk_src.clkr,
3029 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp1_cc_mdss_pclk1_clk_src.clkr,
Ddispcc-sm8450.c1714 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
Ddispcc-sm8550.c1710 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
/linux-6.6.21/arch/arm64/boot/dts/qcom/
Dsm8350.dtsi2731 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dsm8150.dtsi3888 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dsm8550.dtsi2740 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dsdm845.dtsi4715 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dsm8450.dtsi3027 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
Dsm8250.dtsi4511 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;