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Searched refs:DCIO_GSL1_TIMING_SYNC_SEL_PIPE (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_enum.h319 DCIO_GSL1_TIMING_SYNC_SEL_PIPE = 0x0, enumerator
Ddce_11_0_enum.h1088 DCIO_GSL1_TIMING_SYNC_SEL_PIPE = 0x0, enumerator
Ddce_11_2_enum.h1487 DCIO_GSL1_TIMING_SYNC_SEL_PIPE = 0x0, enumerator
/linux-6.6.21/drivers/gpu/drm/amd/include/
Dvega10_enum.h12041 DCIO_GSL1_TIMING_SYNC_SEL_PIPE = 0x00000000, enumerator