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Searched refs:CSR_CFG_MASK (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/arch/loongarch/kernel/
Dhw_breakpoint.c72 GEN_READ_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val); in read_wb_reg()
87 GEN_WRITE_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val); in write_wb_reg()
202 write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); in hw_breakpoint_control()
203 write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); in hw_breakpoint_control()
219 write_wb_reg(CSR_CFG_MASK, i, 0, 0); in hw_breakpoint_control()
220 write_wb_reg(CSR_CFG_MASK, i, 1, 0); in hw_breakpoint_control()
526 mask = read_wb_reg(CSR_CFG_MASK, 0, 0); in hw_breakpoint_thread_switch()
/linux-6.6.21/arch/loongarch/include/asm/
Dhw_breakpoint.h46 #define CSR_CFG_MASK (CSR_CFG_ADDR + LOONGARCH_MAX_BRP) macro
47 #define CSR_CFG_CTRL (CSR_CFG_MASK + LOONGARCH_MAX_BRP)