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Searched refs:CP_RB0_CNTL__RB_BLKSZ_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2718 #define CP_RB0_CNTL__RB_BLKSZ_MASK 0x00003f00L macro
Dgfx_7_2_sh_mask.h1043 #define CP_RB0_CNTL__RB_BLKSZ_MASK 0x3f00 macro
Dgfx_8_0_sh_mask.h1359 #define CP_RB0_CNTL__RB_BLKSZ_MASK 0x3f00 macro
Dgfx_8_1_sh_mask.h1883 #define CP_RB0_CNTL__RB_BLKSZ_MASK 0x3f00 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10699 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_9_1_sh_mask.h12180 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_9_2_1_sh_mask.h11985 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_9_4_3_sh_mask.h13707 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_9_4_2_sh_mask.h2001 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_11_0_0_sh_mask.h15111 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_10_1_0_sh_mask.h17607 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_11_0_3_sh_mask.h17263 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro
Dgc_10_3_0_sh_mask.h15867 #define CP_RB0_CNTL__RB_BLKSZ_MASK … macro