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Searched refs:CPG_PLLC2CR (Results 1 – 1 of 1) sorted by relevance

/linux-6.6.21/drivers/clk/renesas/
Dclk-r8a7740.c25 #define CPG_PLLC2CR 0x2c macro
107 u32 value = readl(base + CPG_PLLC2CR); in r8a7740_cpg_register_clock()